EPM5032PC-15 vs EPM5032LC-20 Comparaison
Comparaison détaillée côte à côte de EPM5032PC-15 par Altera et EPM5032LC-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032PC-15 | EPM5032LC-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,10 | $8,40 |
| Device Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable PLD) | — |
| Macro Cells | 32 | — |
| Usable Gates | 600 | 600 gates |
| Logic Elements / LABs | 1 LAB (4 macrocells per group) | — |
| Propagation Delay (tPD) | 15 ns | 20 ns |
| Maximum Internal Frequency | 76.9 MHz (some sources list 83.3 MHz) | — |
| Operating Voltage (VCC) | 5 V (typ.) | — |
| Technology Node | 0.8 micron CMOS | — |
| Configuration Memory | UV-Erasable EPROM | — |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Total Array Inputs | 24 | — |
| Boîtier | 28-pin PDIP (PC suffix = windowed CerDIP) | LCC-28 (Plastic Leaded Chip Carrier, J-lead) |
| Pin/Package Suffix | PC = Windowed Ceramic DIP | — |
| Speed Grade | 15 (15 ns tPD) | -20 (20 ns pin-to-pin) |
| Température de fonctionnement | 0C to +70C (commercial) | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) |
| Programming Tool | Altera Logic Programmer + MAX+plus II | — |
| Statut RoHS | Non-compliant (CerDIP window, contains Be) | [DATA_NEEDED: RoHS status] |
| Lead-Free | No | — |
| Type de montage | Through-Hole (DIP) | Surface Mount |
| Product Type | — | EPLD / CPLD (One-Time Programmable / UV-Erasable) |
| Macrocells | — | 32 |
| Logic Blocks (LABs) | — | 1 |
| Maximum Frequency | — | 71.4 MHz |
| Supply Voltage (VCC) | — | 5 V ±5% |
| Total Inputs | — | 24 |
| Output Functions | — | 16 |
| Product Terms per Output | — | 16 |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Niveau MSL | — | [DATA_NEEDED: MSL] |