EPM5128JC-1 vs EPM5128JC-2 Comparaison
Comparaison détaillée côte à côte de EPM5128JC-1 par Altera et EPM5128JC-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5128JC-1 | EPM5128JC-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $24,95 | $21,75 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Erasable Programmable Logic Device (EPLD/CPLD) | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 40 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| Boîtier | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) | 68-pin CQCC (Ceramic Quad Flat Pack), windowed |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: temperature grade] | [DATA_NEEDED: operating temperature range] |
| Programming Interface | JTAG / Altera dedicated programmer | — |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| Statut RoHS | non_compliant (ceramic windowed package) | Non-compliant (ceramic windowed package contains lead-bearing solder) |
| Statut du cycle de vie | Obsolete - last-time-buy inventory only | — |
| Dedicated Inputs | — | 7 |
| Propagation Delay (tPD) | — | 45 ns (max) |
| Maximum Counter Frequency (fCNT) | — | 50 MHz |
| Input Setup Time (tSU) | — | 7.5 ns |
| Output Drive Current (IOH/IOL) | — | 12 mA DC |
| Process Technology | — | CMOS |
| Tension d'alimentation | — | 5 V (nominal) |
| Program/Erase Method | — | UV (ceramic window) |
| Erase/Program Cycles | — | [DATA_NEEDED: minimum erase/program cycles] |
| Logic Family | — | TTL-compatible I/O |