EPM5128JC-1 vs EPM5128JC-2 Comparison

Detailed side-by-side comparison of EPM5128JC-1 by Altera and EPM5128JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128JC-1 EPM5128JC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $24.95 $21.75
Family MAX 5000 MAX 5000
Device Type Erasable Programmable Logic Device (EPLD/CPLD) UV-Erasable Programmable Logic Device (PLD)
Macrocells 128 128
Usable Gates 2,500 β€”
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] β€”
Maximum Operating Frequency 62.5 MHz β€”
Pin-to-Pin Propagation Delay (tPD) 40 ns β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) β€”
Technology CMOS, UV-erasable EPROM β€”
Package 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) 68-pin CQCC (Ceramic Quad Flat Pack), windowed
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: temperature grade] [DATA_NEEDED: operating temperature range]
Programming Interface JTAG / Altera dedicated programmer β€”
Configuration Memory Non-volatile EPROM (UV-erasable) β€”
RoHS Status non_compliant (ceramic windowed package) Non-compliant (ceramic windowed package contains lead-bearing solder)
Lifecycle Status Obsolete - last-time-buy inventory only β€”
Dedicated Inputs β€” 7
Propagation Delay (tPD) β€” 45 ns (max)
Maximum Counter Frequency (fCNT) β€” 50 MHz
Input Setup Time (tSU) β€” 7.5 ns
Output Drive Current (IOH/IOL) β€” 12 mA DC
Process Technology β€” CMOS
Supply Voltage β€” 5 V (nominal)
Program/Erase Method β€” UV (ceramic window)
Erase/Program Cycles β€” [DATA_NEEDED: minimum erase/program cycles]
Logic Family β€” TTL-compatible I/O

Datasheets & Resources

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