EPM5130GM883B vs EPM5130JI Comparaison
Comparaison détaillée côte à côte de EPM5130GM883B par Altera et EPM5130JI par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5130GM883B | EPM5130JI |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $108,00 | $9,75 |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Series | MAX 5000 | — |
| Device Type | CPLD - Complex Programmable Logic Device | UV-Erasable EPLD (CMOS EPROM) |
| Usable Gates | 5,000 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | [DATA_NEEDED: maximum user I/O count] | — |
| Boîtier | 100-pin CPGA (S-CPGA-P100) | — |
| Nombre de broches | 100 | — |
| Type de montage | Through-Hole (Pin Grid Array) | — |
| Température de fonctionnement | -55C to +125C (MIL-STD-883B screening) | Commercial (0C to +70C) |
| Tension d'alimentation | 5 V | 5 V (typical) |
| Logic Family | CMOS, TTL-compatible | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Propagation Delay | [DATA_NEEDED: tpd in ns] | — |
| Screening Level | MIL-STD-883B Class B | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Non-compliant (contains Pb in ceramic package) |
| Lead Free Status | Lead free / RoHS Compliant (per ICComponents listing) | — |
| Programmable Security | Yes (security bit) | — |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 8 |
| Fréquence d'horloge maximale | — | 33.3 MHz |
| Propagation Delay (tPD) | — | 55 ns |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | 0.75 micron CMOS EPROM |
| Input Logic Standard | — | TTL-compatible |
| Package Type | — | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |