EPM5130GM883B vs EPM5130JI 比較
詳細な並列比較: EPM5130GM883B メーカー: Altera および EPM5130JI メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5130GM883B | EPM5130JI |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $108.00 | $9.75 |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Series | MAX 5000 | — |
| Device Type | CPLD - Complex Programmable Logic Device | UV-Erasable EPLD (CMOS EPROM) |
| Usable Gates | 5,000 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | [DATA_NEEDED: maximum user I/O count] | — |
| パッケージ | 100-pin CPGA (S-CPGA-P100) | — |
| ピン数 | 100 | — |
| 実装タイプ | Through-Hole (Pin Grid Array) | — |
| 動作温度 | -55C to +125C (MIL-STD-883B screening) | Commercial (0C to +70C) |
| 電源電圧 | 5 V | 5 V (typical) |
| Logic Family | CMOS, TTL-compatible | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Propagation Delay | [DATA_NEEDED: tpd in ns] | — |
| Screening Level | MIL-STD-883B Class B | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | Non-compliant (contains Pb in ceramic package) |
| Lead Free Status | Lead free / RoHS Compliant (per ICComponents listing) | — |
| Programmable Security | Yes (security bit) | — |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 8 |
| 最大クロック周波数 | — | 33.3 MHz |
| Propagation Delay (tPD) | — | 55 ns |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | 0.75 micron CMOS EPROM |
| Input Logic Standard | — | TTL-compatible |
| Package Type | — | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |