EPM5192AGC84-20 vs EPM5192AJM84-20 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC84-20 par Altera et EPM5192AJM84-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC84-20 | EPM5192AJM84-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $41,20 | $171,00 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | — |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Boîtier | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | 84-pin CQFP (S-CQCC-J84, J-lead) |
| Package Code | WPGA | — |
| Erasure Method | UV-Erasable (with OTP window) | UV (quartz-windowed CQFP) or OTP |
| Process Technology | CMOS | CMOS EPROM (UV-erasable) |
| Operating Temperature Grade | Commercial | — |
| Tension d'alimentation | [DATA_NEEDED: VCC range] | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs status] |
| Type de montage | Through-Hole (Pin Grid Array socket) | — |
| Manufacturer | — | Altera (now Intel) |
| Series | — | MAX 5000 (EPM5192) |
| Device Type | — | CMOS UV-Erasable/OTP Complex PLD |
| Logic Array Blocks (LABs) | — | 12 |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |
| Fréquence d'horloge maximale | — | 66.7 MHz |
| Propagation Delay (tPD) | — | 33 ns (speed grade -20) |
| Terminal Form | — | J-Bend |
| Temperature Grade | — | MILITARY |