EPM5192AGC84-20 vs EPM5192AJM84-20 对比

详细并排对比 EPM5192AGC84-20 出自 Altera 和 EPM5192AJM84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AGC84-20 EPM5192AJM84-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $41.20 $171.00
Product Type Complex Programmable Logic Device (CPLD) —
Family MAX 5000 —
Macrocells 192 192
User I/O Pins 64 64
Dedicated Inputs 7 7
Logic Gates (typical) [DATA_NEEDED: typical gate count] —
Maximum Clock Frequency (fMAX) 66.7 MHz —
Pin-to-Pin Delay (tPD) 20 ns —
Speed Grade -20 —
封装 84-pin Ceramic Pin Grid Array (CPGA, WPGA) 84-pin CQFP (S-CQCC-J84, J-lead)
Package Code WPGA —
Erasure Method UV-Erasable (with OTP window) UV (quartz-windowed CQFP) or OTP
Process Technology CMOS CMOS EPROM (UV-erasable)
Operating Temperature Grade Commercial —
电源电压 [DATA_NEEDED: VCC range] —
I/O Standard 5V CMOS / TTL compatible —
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: rohs status]
安装类型 Through-Hole (Pin Grid Array socket) —
Manufacturer — Altera (now Intel)
Series — MAX 5000 (EPM5192)
Device Type — CMOS UV-Erasable/OTP Complex PLD
Logic Array Blocks (LABs) — 12
Programmable Interconnect — PIA (Programmable Interconnect Array)
最大时钟频率 — 66.7 MHz
Propagation Delay (tPD) — 33 ns (speed grade -20)
Terminal Form — J-Bend
Temperature Grade — MILITARY

数据手册与资源

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