EPM5192GC84-1 vs EPM5192GM Comparaison
Comparaison détaillée côte à côte de EPM5192GC84-1 par Altera et EPM5192GM par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192GC84-1 | EPM5192GM |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $14,20 | $58,00 |
| Family | MAX 5000 | — |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | — |
| Technology | CMOS (EPROM-cell based) | CMOS |
| Macrocells | 192 | — |
| Propagation Delay (tPD) | 40 ns (speed grade -1) | — |
| Fréquence d'horloge maximale | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | — |
| Total Inputs / Outputs | 72 inputs / 64 outputs | — |
| Architecture | Shared input/clock and shared product terms | — |
| Boîtier | 84-pin PGA (Pin Grid Array), WPGA code | CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed) |
| Temperature Grade | Commercial | — |
| Type de montage | Through-hole (PGA socket) | Through-Hole (PGA) |
| Statut RoHS | Compliant (per third-party distributor listing) | Non-compliant (contains lead in ceramic PGA) |
| Programming Method | UV erasure (quartz window) + EPROM programmer | — |
| Logic Element Type | Macrocells with AND/OR array | — |
| Product Family | — | MAX 5000 |
| Device Type | — | UV Erasable Programmable Logic Device (PLD) |
| Number of Macrocells | — | 192 |
| Usable Gates | — | 3,750 |
| Pin-to-Pin Delay (tPD) | — | 15 ns (fastest speed grade); 55 ns (this part) |
| Counter Frequency (fCNT) | — | up to 76.9 MHz |
| Propagation Delay (tPD, this part) | — | 55 ns |
| Erasure Method | — | UV (windowed ceramic package) |
| Tension d'alimentation | — | [DATA_NEEDED: typical VCC range] |
| Maximum User I/O | — | [DATA_NEEDED: exact I/O count for CPGA-84] |
| Température de fonctionnement | — | [DATA_NEEDED: commercial/industrial/military grade] |
| Process Node | — | [DATA_NEEDED: CMOS process geometry] |
| Programming Interface | — | JTAG-compatible (per MAX 5000 family) |