EPM5192GC84-1 vs EPM5192GM 비교

다음의 상세 나란히 비교: EPM5192GC84-1 제조: Altera 및 EPM5192GM 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192GC84-1 EPM5192GM
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $14.20 $58.00
Family MAX 5000 —
Product Type UV-Erasable/OTP Complex PLD (CPLD) —
Technology CMOS (EPROM-cell based) CMOS
Macrocells 192 —
Propagation Delay (tPD) 40 ns (speed grade -1) —
최대 클록 주파수 50 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Dedicated Inputs 7 —
User I/O Pins 64 —
Total Inputs / Outputs 72 inputs / 64 outputs —
Architecture Shared input/clock and shared product terms —
패키지 84-pin PGA (Pin Grid Array), WPGA code CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Temperature Grade Commercial —
실장 유형 Through-hole (PGA socket) Through-Hole (PGA)
RoHS 상태 Compliant (per third-party distributor listing) Non-compliant (contains lead in ceramic PGA)
Programming Method UV erasure (quartz window) + EPROM programmer —
Logic Element Type Macrocells with AND/OR array —
Product Family — MAX 5000
Device Type — UV Erasable Programmable Logic Device (PLD)
Number of Macrocells — 192
Usable Gates — 3,750
Pin-to-Pin Delay (tPD) — 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) — up to 76.9 MHz
Propagation Delay (tPD, this part) — 55 ns
Erasure Method — UV (windowed ceramic package)
공급 전압 — [DATA_NEEDED: typical VCC range]
Maximum User I/O — [DATA_NEEDED: exact I/O count for CPGA-84]
동작 온도 — [DATA_NEEDED: commercial/industrial/military grade]
Process Node — [DATA_NEEDED: CMOS process geometry]
Programming Interface — JTAG-compatible (per MAX 5000 family)

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