EPM5192GM-1 vs EPM5192GI84 Comparaison
Comparaison détaillée côte à côte de EPM5192GM-1 par Altera et EPM5192GI84 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192GM-1 | EPM5192GI84 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,80 | $19,80 |
| Family | MAX 5000 | MAX 5000 |
| Logic Cells | 192 | — |
| Propagation Delay (tpd) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmable Element | UV-erasable EPROM | — |
| Boîtier | CPGA-84 (Windowed Ceramic PGA) | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) |
| Nombre de broches | 84 | — |
| Tension d'alimentation | [DATA_NEEDED: VCC nominal] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: commercial/industrial/military grade] | -40 C to +85 C (industrial) |
| Programmable Macrocells | 192 | — |
| User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Type de montage | Through-Hole (Pin Grid Array socket) | Through-Hole (PGA socket or PCB pin/peg) |
| RoHS Compliance | unknown (legacy ceramic PGA) | — |
| Lead-Free Status | unknown | — |
| Programming Interface | Altera ByteBlaster / JEDEC bitstream | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Device Type | — | UV-Erasable / OTP Complex PLD (CPLD) |
| Macrocells | — | 192 |
| Logic Array Blocks | — | [DATA_NEEDED: number of LABs] |
| Package Code | — | WPGA |
| Operating Voltage (VCC) | — | 5 V (typical) |
| I/O Logic Compatibility | — | TTL |
| Temperature Grade | — | Industrial |
| Programmable Flip-Flop Modes | — | D, T, JK, SR |
| Programmability | — | UV-erasable (windowed) / OTP |
| Programming File Format | — | JEDEC map via MAX+PLUS II / A+PLUS |
| Propagation Delay | — | [DATA_NEEDED: tPD in ns] |
| Max User I/O Pins | — | [DATA_NEEDED: usable I/O count for this package] |
| Statut RoHS | — | [DATA_NEEDED: most legacy PGA parts are non-RoHS] |
| Lead-Free | — | [DATA_NEEDED: legacy part, likely contains lead] |
| Number of Terminals | — | 84 |
| Terminal Form | — | PIN/PEG |
| Package Shape | — | SQUARE |