EPM5192LC vs EPM5192GM Comparaison
Comparaison détaillée côte à côte de EPM5192LC par Altera et EPM5192GM par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192LC | EPM5192GM |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $28,40 | $58,00 |
| Family | MAX 7000S | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Global Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 55 ns (typical, commercial) | — |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS, UV-erasable/OTP EPROM configuration | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA), fixed delay | — |
| Boundary-Scan Support | JTAG IEEE 1149.1 | — |
| Programming Interface | JTAG (ByteBlaster-compatible) | JTAG-compatible (per MAX 5000 family) |
| Operating Temperature (commercial) | 0C to +70C | — |
| Boîtier | JLCC-68 (windowed ceramic, LC suffix) | CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed) |
| Type de montage | Surface Mount | Through-Hole (PGA) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead in ceramic PGA) |
| Product Family | — | MAX 5000 |
| Device Type | — | UV Erasable Programmable Logic Device (PLD) |
| Technology | — | CMOS |
| Number of Macrocells | — | 192 |
| Usable Gates | — | 3,750 |
| Pin-to-Pin Delay (tPD) | — | 15 ns (fastest speed grade); 55 ns (this part) |
| Counter Frequency (fCNT) | — | up to 76.9 MHz |
| Propagation Delay (tPD, this part) | — | 55 ns |
| Erasure Method | — | UV (windowed ceramic package) |
| Tension d'alimentation | — | [DATA_NEEDED: typical VCC range] |
| Maximum User I/O | — | [DATA_NEEDED: exact I/O count for CPGA-84] |
| Température de fonctionnement | — | [DATA_NEEDED: commercial/industrial/military grade] |
| Process Node | — | [DATA_NEEDED: CMOS process geometry] |