EPM7128EQI100-15 vs EPM7096QI100-15 Comparaison
Comparaison détaillée côte à côte de EPM7128EQI100-15 par Altera et EPM7096QI100-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7128EQI100-15 - MAX 7000 CPLD, 128 Macrocells, 15ns | Altera/Intel
EPM7128EQI100-15 ObsoleteAltera
EPM7096QI100-15 - MAX 7000 CPLD 96 Macro 76 I/O 15ns | Altera
EPM7096QI100-15 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM7128EQI100-15 | EPM7096QI100-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $32,75 | $14,20 |
| Family | MAX 7000 | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macrocells | 128 | — |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| User I/O Pins | 84 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| Température de fonctionnement | -40 °C to +85 °C (industrial grade, "I" suffix) | -40C to +85C (industrial, per Q-suffix) |
| Boîtier | 100-pin PQFP (BQFP, 14x20 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Statut RoHS | Compliant (lead-free; verify per lot) | [DATA_NEEDED: RoHS compliance status not stated in verified data] |
| Manufacturer | Altera (now Intel FPGA) | — |
| Series | — | MAX 7000 |
| Programmable Type | — | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | — | 96 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of Usable Gates | — | 1,800 |
| Number of I/O Pins | — | 76 |
| Maximum Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Boîtier / Format | — | 100-BQFP (BQFP-100) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG (ISP) |
| Packaging | — | Tray |