EPM7128EQI100-15 vs EPM7096QI100-15 对比

详细并排对比 EPM7128EQI100-15 出自 Altera 和 EPM7096QI100-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7096QI100-15 EPM7096QI100-15 - MAX 7000 CPLD 96 Macro 76 I/O 15ns | Altera

EPM7096QI100-15 - MAX 7000 CPLD 96 Macro 76 I/O 15ns | Altera

EPM7096QI100-15 ⚠ 最后一次采购

规格对比

参数 EPM7128EQI100-15 EPM7096QI100-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $32.75 $14.20
Family MAX 7000 —
Device Type CPLD - Complex Programmable Logic Device CPLD - Complex Programmable Logic Device
Macrocells 128 —
Usable Gates 2.5K —
Logic Array Blocks (LABs) 8 (16 macrocells each) —
User I/O Pins 84 —
Pin-to-Pin Propagation Delay (tPD) 15 ns —
Maximum Operating Frequency 76.9 MHz —
Supply Voltage (VCCINT/VCCIO) 4.75 V to 5.25 V (5 V nominal) —
工作温度 -40 °C to +85 °C (industrial grade, "I" suffix) -40C to +85C (industrial, per Q-suffix)
封装 100-pin PQFP (BQFP, 14x20 mm) —
安装类型 Surface Mount Surface Mount
Programming Technology EEPROM (non-volatile, in-system programmable) —
Boundary Scan IEEE 1149.1 (JTAG) compliant —
RoHS 状态 Compliant (lead-free; verify per lot) [DATA_NEEDED: RoHS compliance status not stated in verified data]
Manufacturer Altera (now Intel FPGA) —
Series — MAX 7000
Programmable Type — EE PLD (EEPROM-based, in-system programmable)
Number of Macrocells — 96
Number of Logic Array Blocks (LABs) — 4
Number of Usable Gates — 1,800
Number of I/O Pins — 76
Maximum Propagation Delay (tPD) — 15 ns
Supply Voltage (VCC) — 4.5 V to 5.5 V
封装 / 外壳 — 100-BQFP (BQFP-100)
Programming Interface — IEEE Std. 1149.1 JTAG (ISP)
Packaging — Tray

数据手册与资源

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