EPM7160STI100-10 vs EPM7160SQC160-10 Comparaison
Comparaison détaillée côte à côte de EPM7160STI100-10 par Altera et EPM7160SQC160-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteComparaison des spécifications
| Paramètre | EPM7160STI100-10 | EPM7160SQC160-10 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $90,43 | $12,20 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | — |
| Usable Gates | 3,200 | — |
| User I/Os | 84 | 104 |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Internal Supply Voltage | 4.75 V to 5.25 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Température de fonctionnement | -40 C to +85 C (Industrial) | 0 C to +70 C (commercial) |
| Boîtier | TQFP-100 (100-pin Thin Quad Flat Pack) | PQFP-160 (SQC160) |
| Type de montage | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | unknown |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Macro Cells | — | 160 |
| Logic Elements / Gates | — | 3,200 usable gates |
| Logic Array Blocks (LABs) | — | 10 |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage Tolerance | — | 5.0 V |
| Programming Technology | — | EEPROM, in-system programmable |
| JTAG Support | — | IEEE 1149.1 (boundary-scan + ISP) |
| Logic Family | — | CMOS |
| Process Technology | — | CMOS, EEPROM-based |