EPM7160STI100-10 vs EPM7160SQC160-10 비교
다음의 상세 나란히 비교: EPM7160STI100-10 제조: Altera 및 EPM7160SQC160-10 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 Obsolete사양 비교
| 파라미터 | EPM7160STI100-10 | EPM7160SQC160-10 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $90.43 | $12.20 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | — |
| Usable Gates | 3,200 | — |
| User I/Os | 84 | 104 |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Internal Supply Voltage | 4.75 V to 5.25 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| 동작 온도 | -40 C to +85 C (Industrial) | 0 C to +70 C (commercial) |
| 패키지 | TQFP-100 (100-pin Thin Quad Flat Pack) | PQFP-160 (SQC160) |
| 실장 유형 | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | unknown |
| MSL 레벨 | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Macro Cells | — | 160 |
| Logic Elements / Gates | — | 3,200 usable gates |
| Logic Array Blocks (LABs) | — | 10 |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage Tolerance | — | 5.0 V |
| Programming Technology | — | EEPROM, in-system programmable |
| JTAG Support | — | IEEE 1149.1 (boundary-scan + ISP) |
| Logic Family | — | CMOS |
| Process Technology | — | CMOS, EEPROM-based |