EPM7192EQC160-20 vs EPM7192EGM160-15 Comparaison
Comparaison détaillée côte à côte de EPM7192EQC160-20 par Intel et EPM7192EGM160-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 ObsoleteComparaison des spécifications
| Paramètre | EPM7192EQC160-20 | EPM7192EGM160-15 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $58,26 | $36,80 |
| Series | MAX 7000 | — |
| Programmable Type | EE PLD (EEPROM-based) | — |
| Number of Macrocells | 192 | — |
| Number of Logic Array Blocks | 4 | — |
| Number of User I/O Pins | 124 (per package), 36 (per data source variant description) | — |
| Delay Time (tPD) | 20 ns | — |
| Internal Counter Frequency (fCNT) | 100 MHz typical | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Température de fonctionnement | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Boîtier / Format | 160-BQFP / 160-PQFP (28x28 mm) | — |
| Type de montage | Surface Mount | Through-hole (PGA socket) |
| In-System Programmable (ISP) | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) | — |
| Programmable Security Bit | Yes | — |
| Power-Saving Mode | Yes, programmable per macrocell | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - non-RoHS era part] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 7000 |
| Sub-family | — | MAX 7000E |
| Device | — | EPM7192E |
| Macrocells | — | 192 |
| Usable Gates | — | 3750 |
| Logic Array Blocks (LABs) | — | 12 (16 macrocells each) |
| User I/O Pins | — | 124 |
| Boîtier | — | 160-pin PGA (Pin Grid Array), ceramic |
| Pin-to-Pin Logic Delay (tPD) | — | 15 ns |
| Supply Voltage (Core) | — | 5 V ±5% |
| I/O Voltage | — | 3.3 V or 5 V configurable |
| Technology | — | CMOS EEPROM (0.5 µm) |
| Programming Interface | — | JTAG (ByteBlaster / BitBlaster) |