EPM9320ALC84-10 vs EPM9320ALI84-10N Comparaison
Comparaison détaillée côte à côte de EPM9320ALC84-10 par Intel et EPM9320ALI84-10N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9320ALC84-10 | EPM9320ALI84-10N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,80 | $21,95 |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9320 | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | 20 |
| Maximum User I/O Pins | 52 | — |
| Dedicated Inputs | 16 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| In-System Programmability | 5.0 V ISP via IEEE 1149.1 JTAG | Yes (IEEE Std. 1149.1 JTAG) |
| Technology | CMOS EEPROM-based, third-generation MAX | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (speed grade -10) | — |
| Boîtier | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead, 1.270 mm pitch) |
| Température de fonctionnement | [DATA_NEEDED: commercial/industrial grade] | -40C to +85C (industrial) |
| Type de montage | Surface Mount / Through-Hole (PLCC socket) | Surface Mount (PLCC socket compatible) |
| Statut RoHS | [DATA_NEEDED] | — |
| Non-Volatile Configuration | Yes (EEPROM cell, powers up in known state) | — |
| Architecture | MAX (Multiple Array MatriX) with FastTrack Interconnect | MAX (Multiple Array MatriX), 3rd generation |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Process Technology | — | CMOS EEPROM |
| Usable Gates | — | 6,000 to 12,000 |
| User I/O Pins | — | 56 |
| Pin-to-Pin Delay | — | 10 ns |
| Maximum Counter Frequency | — | 144.9 MHz |
| VCCINT (Core Supply) | — | 5.0 V |
| VCCIO (I/O Supply) | — | 3.3 V or 5.0 V |
| Input Logic Levels | — | TTL-compatible (at 5.0 V VCCINT) |
| Configuration Memory | — | EEPROM, non-volatile |