EPM9320ALC84-10 vs EPM9320ALI84-10N Comparison
Detailed side-by-side comparison of EPM9320ALC84-10 by Intel and EPM9320ALI84-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALC84-10 | EPM9320ALI84-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9320 | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | 20 |
| Maximum User I/O Pins | 52 | — |
| Dedicated Inputs | 16 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| In-System Programmability | 5.0 V ISP via IEEE 1149.1 JTAG | Yes (IEEE Std. 1149.1 JTAG) |
| Technology | CMOS EEPROM-based, third-generation MAX | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (speed grade -10) | — |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead, 1.270 mm pitch) |
| Operating Temperature | [DATA_NEEDED: commercial/industrial grade] | -40C to +85C (industrial) |
| Mounting Type | Surface Mount / Through-Hole (PLCC socket) | Surface Mount (PLCC socket compatible) |
| RoHS Status | [DATA_NEEDED] | — |
| Non-Volatile Configuration | Yes (EEPROM cell, powers up in known state) | — |
| Architecture | MAX (Multiple Array MatriX) with FastTrack Interconnect | MAX (Multiple Array MatriX), 3rd generation |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Process Technology | — | CMOS EEPROM |
| Usable Gates | — | 6,000 to 12,000 |
| User I/O Pins | — | 56 |
| Pin-to-Pin Delay | — | 10 ns |
| Maximum Counter Frequency | — | 144.9 MHz |
| VCCINT (Core Supply) | — | 5.0 V |
| VCCIO (I/O Supply) | — | 3.3 V or 5.0 V |
| Input Logic Levels | — | TTL-compatible (at 5.0 V VCCINT) |
| Configuration Memory | — | EEPROM, non-volatile |