EPM9560RC208-10 vs EPM9560RC208-20 Comparaison
Comparaison détaillée côte à côte de EPM9560RC208-10 par Intel et EPM9560RC208-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9560RC208-10 | EPM9560RC208-20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $15,40 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 (208-pin package variant) | — |
| Usable Gates | 12,000 | 12,000 |
| Pin-to-Pin Delay (tPD) | 10 ns | 20 ns |
| Maximum Frequency (fMAX) | [DATA_NEEDED: internal toggle frequency in MHz] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Standards Supported | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) | — |
| Configuration Memory | EEPROM (in-system programmable via JTAG) | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Boîtier | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP (28x28 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Lead-Free | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] | — |
| Statut RoHS | [DATA_NEEDED: not stated in retrieved distributor listings] | [DATA_NEEDED: RoHS status] |
| Programmability | JTAG (IEEE 1149.1) in-system programming | — |
| Device Family | — | MAX 9000 (EPM9560) |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Fréquence d'horloge maximale | — | 100 MHz |
| Tension d'alimentation | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| Flip-Flops | — | 772 |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |