EPM9560RC208-15 vs EPM9560RC208-15N Comparaison
Comparaison détaillée côte à côte de EPM9560RC208-15 par Altera et EPM9560RC208-15N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM9560RC208-15 | EPM9560RC208-15N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $19,85 |
| Family | MAX 9000 | — |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 gates | 12,000 |
| Macro Cells | 560 macro cells | — |
| Pin-to-Pin Delay | 15 ns | — |
| Counter Speed | 117.6 MHz | — |
| Tension d'alimentation | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Boîtier | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Number of I/O Pins | [DATA_NEEDED: number of I/O pins] | — |
| Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] |
| Speed Grade | -15 (15 ns pin-to-pin) | -15 (15 ns tPD) |
| Architecture | Third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX) - third generation |
| Series | — | MAX 9000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O | — | 212 (in 208-RQFP, see family datasheet) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Internal Frequency | — | 117.6 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |
| Operating Temperature (commercial) | — | 0C to +70C |