EPM9560RC304-15C vs EPM9560RC304-2 Comparaison
Comparaison détaillée côte à côte de EPM9560RC304-15C par Altera et EPM9560RC304-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteIntel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteComparaison des spécifications
| Paramètre | EPM9560RC304-15C | EPM9560RC304-2 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $24,50 | $55,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (EPLD - Erasable PLD) |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | Multiple Array MatriX (MAX) - third generation |
| Usable Gates | 12,000 | Approximately 12,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins (maximum) | 212 | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Tension d'alimentation | 5.0 V | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Program/Erase Endurance | 100 cycles minimum | — |
| Boîtier | 304-pin RQFP | 304-pin RQFP (RC) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0 C to +70 C (Commercial) | Commercial (0C to +70C) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Macrocells | — | [DATA_NEEDED: macrocell count] |
| User I/O Pins | — | 304 |
| Speed Grade | — | -2 |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |