EPM9560RC304-15F vs EPM9560RC304-2 Comparaison
Comparaison détaillée côte à côte de EPM9560RC304-15F par Altera et EPM9560RC304-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteIntel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteComparaison des spécifications
| Paramètre | EPM9560RC304-15F | EPM9560RC304-2 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,75 | $55,00 |
| Device Family | MAX 9000 | — |
| Series | EPM9560 | — |
| Macrocells | 560 | [DATA_NEEDED: macrocell count] |
| Usable Gates | 12,000 | Approximately 12,000 |
| Propagation Delay (tpd) | 16.6 ns (max) | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Core Supply Voltage | 5.0 V | 5.0 V |
| User I/O Pins | 212 | 304 |
| Dedicated Inputs | 4 | — |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | 16 |
| Boîtier | RQFP-304 (304-pin Plastic QFP) | 304-pin RQFP (RC) |
| Programming Technology | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) | EEPROM (in-system programmable) |
| Architecture | Multiple Array MatriX (MAX) with PIA interconnect | Multiple Array MatriX (MAX) - third generation |
| Boundary Scan Test (BST) | Yes, JTAG-compliant | — |
| Température de fonctionnement | -40C to +85C (industrial) | Commercial (0C to +70C) |
| Process Technology | High-performance CMOS, EEPROM-based | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 (168 hours) | — |
| Statut RoHS | [DATA_NEEDED: rohs status - not stated in source] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (EPLD - Erasable PLD) |
| Speed Grade | — | -2 |
| I/O Supply Voltage | — | 5.0 V |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |