EPM9560RC304-3 vs EPM9560RCRC304-15 Comparaison
Comparaison détaillée côte à côte de EPM9560RC304-3 par Intel et EPM9560RCRC304-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9560RC304-3 | EPM9560RCRC304-15 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,90 | $0,00 |
| Family | MAX 9000 (EPLD) | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | 560 |
| Maximum Operating Frequency | 95 MHz (speed grade -3) | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Technology | UV-erasable CMOS EPROM | — |
| Boîtier | 304-pin RQFP (Plastic Quad Flat Pack) | 304-pin RQFP (PowerQuad Flat Pack) |
| User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Programming Interface | JTAG / 4-wire ISP (ByteBlaster compatible) | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | [DATA_NEEDED: LAB count] |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Type de montage | Surface Mount | Surface Mount |
| Speed Grade | -3 (fastest) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | MAX 9000 (EPM9560) |
| Logic Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Frequency | — | 117.6 MHz |
| Tension d'alimentation | — | 5.0 V |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |
| In-System Programmability (ISP) | — | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | — | IEEE Std. 1149.1 (built-in) |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Number of User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |
| Lead Finish | — | [DATA_NEEDED: lead finish] |