EPM9560RI208-15N vs EPM9560RI208-20W Comparaison
Comparaison détaillée côte à côte de EPM9560RI208-15N par Altera et EPM9560RI208-20W par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9560RI208-15N | EPM9560RI208-20W |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,45 | $48,75 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Device Family | MAX 9000 | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | Third-generation Multiple Array MatriX (MAX) |
| Configuration Memory | CMOS EEPROM, in-system programmable | — |
| Boîtier | 208-pin RQFP (Ruggedized Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Total Pins | 356 (per third-party catalog; see _validation_note) | — |
| Package Pin Count | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Code | HFQFP | — |
| User I/Os | 216 (per DigiChip specification; see _validation_note) | — |
| Maximum Internal Frequency | 145 MHz | — |
| Propagation Delay (tPD) | 11.4 ns (15 ns speed grade) | — |
| Speed Grade | -15 | -20 |
| Tension d'alimentation | 5.0 V | 5.0 V |
| Température de fonctionnement | 0C to 70C (Commercial) | -40C to +85C (Industrial) |
| Temperature Grade | Industrial (per Vyrian/Partstack listings) | — |
| Logic Family | CMOS | — |
| Programming Interface | IEEE 1149.1 JTAG, 5.0-V in-system | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Family | — | MAX 9000 |
| Usable Gates | — | 12,000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 LABs of 40 macrocells each |
| User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Programming Technology | — | CMOS EEPROM |