EPM9560RI240-20 vs EPM9560RI240-15 Comparaison
Comparaison détaillée côte à côte de EPM9560RI240-20 par Altera et EPM9560RI240-15 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteComparaison des spécifications
| Paramètre | EPM9560RI240-20 | EPM9560RI240-15 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $23,10 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| User I/O Pins | 191 | — |
| Pin-to-Pin Propagation Delay | 20 ns | — |
| Tension d'alimentation | 5.0 V | — |
| Configuration Technology | CMOS EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP) | Yes, JTAG (IEEE Std 1149.1) |
| Boîtier | 240-pin RQFP (PowerQuad II) with exposed pad | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | Industrial (-40C to +85C) | — |
| Logic Gates | 10,000 | — |
| Internal Frequency | [DATA_NEEDED: internal frequency] | — |
| Number of Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| REACH Status | Compliant (per Abacus Technologies listing) | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Packaging | Tray | — |
| Product Type | — | EE PLD (Electrically Erasable Programmable Logic Device) |
| Flip-Flops | — | 772 |
| User I/Os (industrial grade) | — | 191 |
| Dedicated Inputs | — | 4 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Internal Frequency (max) | — | 145 MHz |
| Logic Family / Process | — | CMOS, EEPROM-based |
| Core Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5.0 V (configurable) |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Température de fonctionnement | — | -40 C to +85 C (industrial) |
| Power-Up Configuration | — | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | — | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | — | 7.0 V for <20 ns (no-load) |