EPM9560RI240-20 vs EPM9560RI240-15 对比

详细并排对比 EPM9560RI240-20 出自 Altera 和 EPM9560RI240-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI240-20 EPM9560RI240-15
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $0.00 $23.10
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 560
User I/O Pins 191 —
Pin-to-Pin Propagation Delay 20 ns —
电源电压 5.0 V —
Configuration Technology CMOS EEPROM (non-volatile) —
In-System Programmability Yes (ISP) Yes, JTAG (IEEE Std 1149.1)
封装 240-pin RQFP (PowerQuad II) with exposed pad RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch)
安装类型 Surface Mount Surface Mount
工作温度范围 Industrial (-40C to +85C) —
Logic Gates 10,000 —
Internal Frequency [DATA_NEEDED: internal frequency] —
Number of Logic Array Blocks [DATA_NEEDED: number of logic array blocks] —
RoHS 状态 [DATA_NEEDED: RoHS status] —
REACH Status Compliant (per Abacus Technologies listing) —
MSL 等级 [DATA_NEEDED: MSL level] —
Packaging Tray —
Product Type — EE PLD (Electrically Erasable Programmable Logic Device)
Flip-Flops — 772
User I/Os (industrial grade) — 191
Dedicated Inputs — 4
Propagation Delay (tPD) — 15 ns (speed grade -15)
Internal Frequency (max) — 145 MHz
Logic Family / Process — CMOS, EEPROM-based
Core Voltage — 5.0 V
I/O Voltage — 3.3 V or 5.0 V (configurable)
Architecture — Multiple Array MatriX (MAX), 3rd generation
工作温度 — -40 C to +85 C (industrial)
Power-Up Configuration — Instant-on (no external boot PROM)
I/O Undershoot Tolerance — -2.0 V for <20 ns (no-load)
I/O Overshoot Tolerance — 7.0 V for <20 ns (no-load)

数据手册与资源

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