LC4064C-5T44C vs LC4064V-5T44C Comparaison

Comparaison détaillée côte à côte de LC4064C-5T44C par Lattice Semiconductor et LC4064V-5T44C par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Lattice Semiconductor
LC4064C-5T44C LC4064C-5T44C - 64-Macrocell 5 ns CPLD | Lattice Semiconductor

LC4064C-5T44C - 64-Macrocell 5 ns CPLD | Lattice Semiconductor

LC4064C-5T44C Unknown
Lattice Semiconductor
LC4064V-5T44C LC4064V-5T44C - 5 ns 64-Macrocelle ISP CPLD | Lattice

LC4064V-5T44C - 5 ns 64-Macrocelle ISP CPLD | Lattice

LC4064V-5T44C Unknown

Comparaison des spécifications

Paramètre LC4064C-5T44C LC4064V-5T44C
Marque Lattice Semiconductor Lattice Semiconductor
Catégorie FPGA & CPLD FPGA & CPLD
Statut du cycle de vie Unknown Unknown
Device Type SuperFast high-density in-system-programmable PLD Complex Programmable Logic Device (CPLD)
Device Family ispMACH 4000C —
Architecture Complex programmable logic device —
Macrocell Count 64 macrocells —
Speed Grade 5 ns —
Maximum Operating Frequency 227 MHz —
Maximum fMAX 400 MHz —
Propagation Delay 2.5 ns 5 ns
Supply Voltage Options 1.8 V, 2.5 V, and 3.3 V —
Nominal Supply Voltage 1.8 V —
Programming Type In-system programmable —
Configuration Memory Nonvolatile programmable logic configuration —
Global Clock Inputs Up to 4 —
Global Clock Polarity Programmable —
Output Routing Capacity Up to 80 product terms per output —
Boîtier 44-pin TQFP 44-TQFP, 10 x 10 mm
Packaging Tray —
Type de montage Surface mount Surface mount
Plage de température de fonctionnement [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
I/O Standard [DATA_NEEDED: supported I/O standards] —
RoHS Compliance [DATA_NEEDED: RoHS compliance status] —
REACH Compliance [DATA_NEEDED: REACH compliance status] —
Product Family — ispMACH 4000V series
Macrocells — 64 macrocells
Logic Array Blocks — 4 logic array blocks
User I/O Pins — 30 user I/O pins
Internal Supply Voltage — 3 V to 3.6 V
Programming Supply Options — 3.3 V, 2.5 V, or 1.8 V
Programming Method — In-system programmable
Lead Pitch — [DATA_NEEDED: TQFP lead pitch]
Fréquence d'horloge maximale — [DATA_NEEDED: maximum clock frequency]
Configuration Memory Type — [DATA_NEEDED: configuration memory type]
I/O Standards — [DATA_NEEDED: supported I/O standards]
Courant d'alimentation — [DATA_NEEDED: typical and maximum supply current]
Statut RoHS — [DATA_NEEDED: RoHS status]
REACH Status — [DATA_NEEDED: REACH status]
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]
Statut du cycle de vie — [DATA_NEEDED: lifecycle status]

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