LC4064C-5T44C vs LC4064V-5T44C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LC4064C-5T44C sa pamamagitan ng Lattice Semiconductor at LC4064V-5T44C sa pamamagitan ng Lattice Semiconductor. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Lattice Semiconductor
LC4064C-5T44C - 64-Macrocell 5 ns CPLD | Lattice Semiconductor
LC4064C-5T44C UnknownPagsanggunian na paghahambing
| Parametro | LC4064C-5T44C | LC4064V-5T44C |
|---|---|---|
| Brand | Lattice Semiconductor | Lattice Semiconductor |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Unknown | Unknown |
| Device Type | SuperFast high-density in-system-programmable PLD | Complex Programmable Logic Device (CPLD) |
| Device Family | ispMACH 4000C | — |
| Architecture | Complex programmable logic device | — |
| Macrocell Count | 64 macrocells | — |
| Speed Grade | 5 ns | — |
| Maximum Operating Frequency | 227 MHz | — |
| Maximum fMAX | 400 MHz | — |
| Propagation Delay | 2.5 ns | 5 ns |
| Supply Voltage Options | 1.8 V, 2.5 V, and 3.3 V | — |
| Nominal Supply Voltage | 1.8 V | — |
| Programming Type | In-system programmable | — |
| Configuration Memory | Nonvolatile programmable logic configuration | — |
| Global Clock Inputs | Up to 4 | — |
| Global Clock Polarity | Programmable | — |
| Output Routing Capacity | Up to 80 product terms per output | — |
| Packhaging | 44-pin TQFP | 44-TQFP, 10 x 10 mm |
| Packaging | Tray | — |
| Uri ng Pagpapasok | Surface mount | Surface mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| I/O Standard | [DATA_NEEDED: supported I/O standards] | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance status] | — |
| REACH Compliance | [DATA_NEEDED: REACH compliance status] | — |
| Product Family | — | ispMACH 4000V series |
| Macrocells | — | 64 macrocells |
| Logic Array Blocks | — | 4 logic array blocks |
| User I/O Pins | — | 30 user I/O pins |
| Internal Supply Voltage | — | 3 V to 3.6 V |
| Programming Supply Options | — | 3.3 V, 2.5 V, or 1.8 V |
| Programming Method | — | In-system programmable |
| Lead Pitch | — | [DATA_NEEDED: TQFP lead pitch] |
| Maksimum na Taktiko ng Oras | — | [DATA_NEEDED: maximum clock frequency] |
| Configuration Memory Type | — | [DATA_NEEDED: configuration memory type] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Kuru-kuryente ng Pagbibigay | — | [DATA_NEEDED: typical and maximum supply current] |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |
| Katayuan ng Lifecycle | — | [DATA_NEEDED: lifecycle status] |