LFE2-20E-5F484C vs LFE2-6E-5F256I Comparaison
Comparaison détaillée côte à côte de LFE2-20E-5F484C par Lattice Semiconductor et LFE2-6E-5F256I par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | LFE2-20E-5F484C | LFE2-6E-5F256I |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Cell Density | 21K LUTs | — |
| Input/Output Count | 331 I/O | — |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | -5 | -5 |
| DSP Capability | DSP | — |
| Boîtier | 484-BBGA | 256-ball Fine Pitch Ball Grid Array |
| Package Type | BGA | — |
| Terminal Count | 484 balls | 256 balls |
| Type de montage | Surface Mount | Surface mount |
| Programmable Device | Yes | — |
| FPGA Family | LatticeECP2 | — |
| Logic Technology | 90 nm CMOS | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| Fréquence d'horloge maximale | [DATA_NEEDED: maximum clock frequency] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| Logic Cells | — | 6,000 cells |
| User I/O | — | 190 I/O |
| Configuration Bits | — | 56,320 bits |
| Core Supply | — | 1.2 V |
| Temperature Grade | — | Industrial |
| Package Abbreviation | — | FPBGA-256 |
| Package Dimensions | — | 17 mm x 17 mm |
| Package Shape | — | Square |
| Terminal Type | — | Ball |
| Lead-Free Status | — | Lead free |
| Programmable Logic Type | — | FPGA |
| DSP Support | — | Advanced DSP blocks supported by the LatticeECP2/M family |
| SERDES Support | — | High-speed SERDES supported by the LatticeECP2M family |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |