LFE2-6E-6FN256I vs LFE2-6E-5F256I Comparaison
Comparaison détaillée côte à côte de LFE2-6E-6FN256I par Lattice Semiconductor et LFE2-6E-5F256I par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Lattice Semiconductor
LFE2-6E-6FN256I - 6K LUT FPGA, 190 I/O, 256-BGA | Lattice
LFE2-6E-6FN256I ✓ ActifComparaison des spécifications
| Paramètre | LFE2-6E-6FN256I | LFE2-6E-5F256I |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Cells | 6,000 cells | 6,000 cells |
| Logic Blocks | 750 LABs | — |
| Embedded RAM | 56,320 bits (67 KB) | — |
| User I/O | 190 I/O | 190 I/O |
| Maximum Frequency | 357 MHz | — |
| Core Supply Voltage | 1.14 V to 1.26 V | — |
| Nominal Core Voltage | 1.2 V | — |
| Process Technology | 90 nm | — |
| Température de fonctionnement | -40°C to +100°C | — |
| Temperature Grade | Industrial | Industrial |
| Boîtier | 256-ball FBGA, 17 mm × 17 mm | 256-ball Fine Pitch Ball Grid Array |
| Package Code | FPBGA-256 | — |
| Type de montage | Surface Mount | Surface mount |
| Terminal Type | Ball | Ball |
| Number of Terminals | 256 balls | — |
| Package Shape | Square | Square |
| Lead-Free Status | Lead free | Lead free |
| Standard Packaging | Tray | — |
| Standard Quantity | 90 units | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH compliance status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Configuration Bits | — | 56,320 bits |
| Core Supply | — | 1.2 V |
| Speed Grade | — | -5 |
| Package Abbreviation | — | FPBGA-256 |
| Package Dimensions | — | 17 mm x 17 mm |
| Terminal Count | — | 256 balls |
| Programmable Logic Type | — | FPGA |
| DSP Support | — | Advanced DSP blocks supported by the LatticeECP2/M family |
| SERDES Support | — | High-speed SERDES supported by the LatticeECP2M family |