LTC2150CUJ-12 vs LTC2150CUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2150CUJ-12 par Analog Devices et LTC2150CUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
LTC2150CUJ-12 - 12-Bit 170Msps Single-Channel ADC | Analog Devices
LTC2150CUJ-12 ✓ ActifAnalog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ ActifComparaison des spécifications
| Paramètre | LTC2150CUJ-12 | LTC2150CUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $25,80 | $41,58 |
| Résolution | 12 bits | 14 bit |
| Sample Rate | 170 Msps (mega-samples per second) | 170 Msps |
| Architecture | Pipelined single-channel | Pipelined |
| Number of Channels | 1 | 1 |
| Boîtier | 40-QFN (6 mm x 6 mm) - UJ suffix | 40-QFN (6 mm × 6 mm) with exposed pad |
| Nombre de broches | 40 | — |
| Analog Supply Voltage | 1.8 V (single supply) | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital I/O Supply Voltage | 1.8 V to 3.3 V | — |
| Full-Power Input Bandwidth | 1.25 GHz | — |
| Analog Input Type | Differential (required) | — |
| Clock Duty Cycle Stabilizer | Yes (optional) | — |
| Low-Power Modes | Sleep and Nap modes | — |
| Configuration Interface | Serial SPI port | Serial SPI port |
| Output Format | LVDS / CMOS selectable (per datasheet) | — |
| Pin Compatibility | Pin-compatible 14-bit versions available | — |
| Plage de température de fonctionnement | [DATA_NEEDED: industrial/commercial grade] | — |
| Statut RoHS | Compliant (PBF suffix) | Compliant (Pb-free #PBF suffix) |
| Digital Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| INL (typical) | — | ±0.85 LSB |
| DNL (typical) | — | ±0.25 LSB |
| Transition Noise | — | 1.82 LSBRMS |
| Missing Codes | — | None over temperature |
| Full-Power Sample/Hold Bandwidth | — | 1.25 GHz |
| Digital Output Interface | — | DDR LVDS |
| Encode Clock Inputs | — | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) |
| Clock Duty-Cycle Stabilizer | — | Optional (selectable) |
| Latency | — | 5 clock cycles |
| Power-Saving Modes | — | Sleep and Nap modes |
| Type de montage | — | Surface Mount |