LTC2150CUJ-12 vs LTC2150CUJ-14 Comparação
Comparação detalhada lado a lado de LTC2150CUJ-12 por Analog Devices e LTC2150CUJ-14 por Analog Devices. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Analog Devices
LTC2150CUJ-12 - 12-Bit 170Msps Single-Channel ADC | Analog Devices
LTC2150CUJ-12 ✓ AtivoAnalog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ AtivoComparação de especificações
| Parâmetro | LTC2150CUJ-12 | LTC2150CUJ-14 |
|---|---|---|
| Marca | Analog Devices | Analog Devices |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $25,80 | $41,58 |
| Resolução | 12 bits | 14 bit |
| Sample Rate | 170 Msps (mega-samples per second) | 170 Msps |
| Architecture | Pipelined single-channel | Pipelined |
| Number of Channels | 1 | 1 |
| Encapsulamento | 40-QFN (6 mm x 6 mm) - UJ suffix | 40-QFN (6 mm × 6 mm) with exposed pad |
| Contagem de pinos | 40 | — |
| Analog Supply Voltage | 1.8 V (single supply) | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital I/O Supply Voltage | 1.8 V to 3.3 V | — |
| Full-Power Input Bandwidth | 1.25 GHz | — |
| Analog Input Type | Differential (required) | — |
| Clock Duty Cycle Stabilizer | Yes (optional) | — |
| Low-Power Modes | Sleep and Nap modes | — |
| Configuration Interface | Serial SPI port | Serial SPI port |
| Output Format | LVDS / CMOS selectable (per datasheet) | — |
| Pin Compatibility | Pin-compatible 14-bit versions available | — |
| Faixa de temperatura de operação | [DATA_NEEDED: industrial/commercial grade] | — |
| Status RoHS | Compliant (PBF suffix) | Compliant (Pb-free #PBF suffix) |
| Digital Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| INL (typical) | — | ±0.85 LSB |
| DNL (typical) | — | ±0.25 LSB |
| Transition Noise | — | 1.82 LSBRMS |
| Missing Codes | — | None over temperature |
| Full-Power Sample/Hold Bandwidth | — | 1.25 GHz |
| Digital Output Interface | — | DDR LVDS |
| Encode Clock Inputs | — | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) |
| Clock Duty-Cycle Stabilizer | — | Optional (selectable) |
| Latency | — | 5 clock cycles |
| Power-Saving Modes | — | Sleep and Nap modes |
| Tipo de montagem | — | Surface Mount |