LTC2261IUJ-14 vs LTC2257IUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2261IUJ-14 par Analog Devices et LTC2257IUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
LTC2257IUJ-14 - 14-bit, 40Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2257IUJ-14 ✓ ActifComparaison des spécifications
| Paramètre | LTC2261IUJ-14 | LTC2257IUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,80 | $16,40 |
| Résolution | 14 bits | 14 bit |
| Sample Rate | 125 Msps | 40 Msps |
| Architecture | Pipelined | Pipelined |
| Number of Channels | 1 | — |
| Input Type | Differential (single-ended capable with biasing) | Differential (single-ended capable) |
| Analog Supply Voltage (AVDD) | 1.8 V | — |
| Output Supply Voltage (OVDD) | 1.2 V to 1.8 V | — |
| Integral Nonlinearity (INL) | ±1 LSB (typical) | — |
| Differential Nonlinearity (DNL) | ±0.3 LSB (typical) | — |
| Transition Noise | 1.2 LSB RMS | 1.13 LSB RMS |
| Signal-to-Noise Ratio (SNR) | 73.4 dB | — |
| Spurious-Free Dynamic Range (SFDR) | 85 dB | — |
| Missing Codes | None over temperature | None over temperature |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS | — |
| Plage de température de fonctionnement | -40 °C to +85 °C (I grade) | — |
| Boîtier | 40-pin QFN (6x6 mm) with exposed pad | 40-QFN (UJ) 6x6 mm with exposed pad |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant (PBF suffix) | Compliant (#PBF suffix) |
| Number of Inputs | — | 1 |
| Analog Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital Output Supply | — | 1.2 V to 1.8 V |
| Power Dissipation | — | [DATA_NEEDED: exact mW at 40 Msps, datasheet figure] |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.3 LSB |
| Output Interface | — | CMOS / DDR CMOS / DDR LVDS (selectable) |
| SNR | — | [DATA_NEEDED: SNR dBFS at fin] |
| SFDR | — | [DATA_NEEDED: SFDR dBc at fin] |
| Température de fonctionnement | — | -40C to +85C (I grade) |
| Configuration Interface | — | SPI serial port |
| Power-Saving Modes | — | Shutdown, Nap modes |
| Clock Duty-Cycle Stabilizer | — | Optional, on-chip |
| Reference Type | — | External or internal (per variant) |