M1AFS250-1FGG256I vs M1AFS250-1FG256 Comparaison
Comparaison détaillée côte à côte de M1AFS250-1FGG256I par Microchip Technology et M1AFS250-1FG256 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
M1AFS250-1FGG256I - 250K Gate Flash FPGA 256-FBGA | Microchip
M1AFS250-1FGG256I ✓ ActifMicrochip Technology
M1AFS250-1FG256 - 250K Gate Fusion FPGA, ARM Cortex-M1 | Microchip
M1AFS250-1FG256 ✓ ActifComparaison des spécifications
| Paramètre | M1AFS250-1FGG256I | M1AFS250-1FG256 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $117,83 |
| Series | M1AFS250 (Fusion) | — |
| System Gates | 250,000 gates | 250000 gates |
| Logic Cells | 6144 | — |
| Total SRAM/Flip-Flop Bits (DigiKey listing) | 36864 | — |
| Number of I/O | 114 | — |
| Maximum System Frequency | 350 MHz | — |
| Processor Core | ARM Cortex-M1 (optional ARM support, M1 variant) | ARM Cortex-M1 |
| Technology | 130-nm, 7-layer metal, flash-based CMOS | 130 nm flash-based |
| Configuration Memory | Nonvolatile flash (Live at Power-Up, LAPU) | — |
| Security | 128-bit flash-based lock, AES decryption | 128-bit flash lock, AES decryption |
| Tension d'alimentation de fonctionnement | 1.5 V | — |
| Minimum Operating Temperature | -40 C | — |
| Maximum Operating Temperature | +85 C | — |
| Boîtier / Format | 256-LBGA (FBGA), 1.00 mm ball pitch | — |
| Style de montage | SMD/SMT | — |
| Packaging | Tray | — |
| Mixed-Signal Features | Configurable analog, flash memory blocks, clock generation and management | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Family | — | Fusion (M1 series, mixed-signal FPGA) |
| User I/O | — | 114 |
| User Flash Memory | — | 36864 bits |
| Core Supply Voltage | — | 1.5 V |
| Maximum Performance | — | 1282.05 MHz (per FindIC spec summary) |
| Configuration | — | Flash-based, live at power-up |
| Boîtier | — | 256-LBGA (FG256) |
| Type de montage | — | Surface Mount |
| Analog Blocks | — | Integrated configurable analog (Fusion) |
| Clock Management | — | Integrated clock generation and management circuitry |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |