M1AFS250-PQ208 vs M1AFS250-1PQ208I Comparaison
Comparaison détaillée côte à côte de M1AFS250-PQ208 par Microsemi et M1AFS250-1PQ208I par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
M1AFS250-1PQ208I - Fusion FPGA 250K Gates 208-QFP | Microchip
M1AFS250-1PQ208I ✓ ActifComparaison des spécifications
| Paramètre | M1AFS250-PQ208 | M1AFS250-1PQ208I |
|---|---|---|
| Marque | Microsemi | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $28,60 | $47,80 |
| Logic Gates | 250000 gates | — |
| Fabric Cells / VersaTiles | 6144 cells | — |
| Number of I/O | 93 | — |
| User Flash Memory | 36864 bits | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm flash CMOS | — |
| Configuration Memory | Flash-based, on-chip (nonvolatile) | Flash (non-volatile, single-chip) |
| Security | 128-bit flash lock, AES decryption | — |
| Boîtier | 208-Pin PQFP / BFQFP | 208-pin PQFP (PQ208 / BFQFP) |
| Terminal Pitch | 0.5 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Analog Blocks | Configurable analog (ADC inputs, monitoring) per Fusion family | — |
| Clock Management | On-chip PLL / clock conditioning circuitry | Clock Conditioning Circuits (CCC) |
| Power-Up Behavior | Functional immediately at power-up (no external boot device) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant (non-Pb PQ208 version is M1AFS250-1PQ208I; PQG208 is Pb-free variant naming) |
| Max Frequency Reference | 1098.9 MHz (family listing per Kynix) | — |
| Logic Cells (Tiles) | — | 6144 |
| Equivalent Gates | — | 250000 |
| User I/O | — | 93 |
| RAM Bits | — | 36864 |
| Family | — | Fusion (M1) Mixed-Signal FPGA |
| Core Voltage | — | 1.5 V |
| Technology | — | 130 nm CMOS Flash |
| Speed Grade | — | -1 |
| Analog Peripherals | — | Configurable analog blocks (voltage, temperature, current monitoring) |
| Niveau MSL | — | [DATA_NEEDED: MSL Level] |
| Radiation Characteristic | — | Flash-based, immune to configuration upset vs SRAM FPGAs |