MC68030FE25C vs MC68030FE20C Comparaison

Comparaison détaillée côte à côte de MC68030FE25C par NXP Semiconductors et MC68030FE20C par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

NXP Semiconductors
MC68030FE25C MC68030FE25C - 25MHz 32-Bit MPU w/ MMU, 132-CQFP | NXP

MC68030FE25C - 25MHz 32-Bit MPU w/ MMU, 132-CQFP | NXP

MC68030FE25C ⚠ Dernier achat
NXP Semiconductors
MC68030FE20C MC68030FE20C - 20MHz 32-Bit M68000 MPU | Motorola

MC68030FE20C - 20MHz 32-Bit M68000 MPU | Motorola

MC68030FE20C Obsolete

Comparaison des spécifications

Paramètre MC68030FE25C MC68030FE20C
Marque NXP Semiconductors NXP Semiconductors
Catégorie Microcontrollers Microcontrollers
Statut du cycle de vie Dernier achat Obsolete
Statut du stock In Stock In Stock
Prix unitaire (USD) $57,40 $92,00
Core Architecture M68000 (M680x0 CISC) —
Largeur du bus de données 32-bit 32-bit
Address Bus Width 32-bit 32-bit
Fréquence d'horloge maximale 25 MHz 20 MHz
Performance approximately 7 MIPS at 25 MHz —
On-chip Caches 256-byte instruction cache + 256-byte data cache (configurable as unified) —
Memory Management Unit (MMU) Integrated, paged, supports 4 KB and 8 KB pages —
Floating Point Support External co-processor (MC68881 / MC68882) via co-processor interface —
Burst Memory Mode Yes (burst-fill for sequential accesses) —
Operating Voltage 5 V 5 V +/- 5%
Boîtier 132-CQFP (24x24 mm, ceramic) 132-pin CQFP (ceramic, windowed)
Temperature Grade Commercial (0C to +70C) —
Type de montage Surface Mount Surface Mount
Instruction Set Compatibility User-mode binary compatible with MC68020; supports M680x0 line-A/line-F emulation —
Statut RoHS [DATA_NEEDED: RoHS status not in verified data] [DATA_NEEDED: RoHS status]
Process Technology HCMOS HCMOS
Family — M68000 (68k)
Core — MC68030 (second-generation 32-bit)
Instruction Cache — 256 bytes
Data Cache — 256 bytes
MMU — Integrated, hardware paged
Package Dimensions — 24 x 24 mm
Power Dissipation — [DATA_NEEDED: typical power in W]
Température de fonctionnement — [DATA_NEEDED: temperature range grade C]
JTAG Support — IEEE 1149.1 boundary-scan
Bus Modes — Dynamic bus sizing (8/16/32-bit)
Lead-Free — [DATA_NEEDED: lead-free status]

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