MC9S08DV60AMLF vs MC9S08DZ60ACLF Comparaison
Comparaison détaillée côte à côte de MC9S08DV60AMLF par NXP Semiconductors et MC9S08DZ60ACLF par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MC9S08DZ60ACLF - 8-bit S08 MCU, 60KB Flash, CAN/LIN, 48-LQFP | NXP
MC9S08DZ60ACLF NrndComparaison des spécifications
| Paramètre | MC9S08DV60AMLF | MC9S08DZ60ACLF |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,60 | $6,85 |
| Manufacturer | NXP Semiconductors (formerly Freescale) | — |
| Series | S08 | — |
| Core Processor | HCS08 (enhanced HC08 with BGND) | — |
| Core Size | 8-bit | — |
| Core Speed | 40 MHz (20 MHz bus) | — |
| Program Memory Size | 60 KB (60K x 8) Flash | — |
| RAM Size | 3 KB | — |
| Supply Voltage Range | 2.7 V to 5.5 V | — |
| Number of I/O | 53 GPIO + 1 input-only | — |
| Communication Interfaces | MSCAN (CAN 2.0A/B), SCI/SPI, LIN master | — |
| ADC | 8-channel 10-bit (per datasheet family) | 24-channel, 12-bit, 2.5 us conversion |
| Timers | Multiple TPM (per datasheet family) | — |
| Boîtier | 48-LQFP (7x7 mm) | 48-LQFP (7x7 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +125C | -40C to +85C (industrial) [DATA_NEEDED: AEC-Q100 grade range] |
| Statut RoHS | ROHS3 Compliant | Compliant |
| Debug Interface | Single-wire BDM | — |
| Core | — | HCS08 (8-bit CISC) |
| Core Frequency | — | 40 MHz (20 MHz bus) |
| Program Memory (Flash) | — | 60 KB (60K x 8) |
| RAM | — | 4 KB |
| EEPROM / Emulated EEPROM | — | Available (size [DATA_NEEDED: EEPROM size]) |
| Operating Voltage | — | 2.7 V to 5.5 V |
| Supply Rails | — | 3.3 V / 5 V |
| CAN | — | 1 x CAN 2.0 A/B |
| LIN | — | Master LIN 2.0 interface |
| Communication Peripherals | — | SCI (SPI), IIC, MSCAN |
| Timer / PWM Channels | — | Multiple (count [DATA_NEEDED: timer/PWM channel count]) |
| LCD Driver | — | Yes (on-chip segment LCD driver) |
| Niveau MSL | — | MSL 3 (per JEDEC J-STD-020) |
| Background Debug Mode (BGND) | — | Yes (on-chip emulation/debug) |
| Instruction Set | — | HC08 instruction set with added BGND instruction |