MPC852TVR100A vs MPC8533EVTALF Comparaison
Comparaison détaillée côte à côte de MPC852TVR100A par NXP Semiconductors et MPC8533EVTALF par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC852TVR100A - 100MHz PowerQUICC I MPU, 32-Bit, BGA-256 | NXP
MPC852TVR100A ⚠ Dernier achatComparaison des spécifications
| Paramètre | MPC852TVR100A | MPC8533EVTALF |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Dernier achat | Actif |
| Manufacturer | NXP Semiconductors (formerly Freescale) | NXP Semiconductors (formerly Freescale) |
| Series | PowerQUICC I (MPC8xx) | MPC85xx |
| Core Architecture | PowerPC MPC8xx, 32-Bit RISC | PowerPC e500v2 |
| Core Frequency | 100 MHz | 667 MHz |
| External Bus Frequency | 66 MHz | — |
| Process Technology | 0.18 micron CMOS | — |
| On-Chip Cache | 8 KB | — |
| Core Voltage (VDD) | 1.8 V (1.7 V to 1.9 V) | — |
| I/O Voltage (VDDH) | 3.3 V with 5 V TTL tolerance | — |
| Boîtier | 256-PBGA (23 x 23 mm) | — |
| Température de fonctionnement | 0C to +95C | 0 C to 90 C |
| Communications Module | CPM with 2 SCC + 1 SMC | — |
| Ethernet | 10/100 Mbps MAC integrated | — |
| Type de montage | Surface Mount (PBGA) | Surface Mount |
| Statut RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Niveau MSL | 3 | — |
| Largeur du bus de données | — | 32-Bit |
| Number of Cores | — | 1 |
| Supply Voltage (Core) | — | 1 V |
| Package Type | — | FCPBGA (FCBGA) |
| Pin/Package Code | — | 783-FCPBGA (29 x 29 mm, 1 mm pitch) |
| Lead Free / RoHS | — | Lead Free, RoHS Compliant |
| Memory Controller | — | DDR/DDR2 with ECC |
| Integrated Peripherals | — | PCI Express, Gigabit Ethernet, DMA, DUART, I2C, SPI, GPIO |
| Special Features | — | QUICC Engine, Security Engine (DES/3DES/AES/SHA) |
| Process Node | — | [DATA_NEEDED: process node] |
| Cache (L1) | — | [DATA_NEEDED: L1 cache size] |