P5020NSE7TNB vs P5020NXE7TNB Comparaison
Comparaison détaillée côte à côte de P5020NSE7TNB par NXP Semiconductors et P5020NXE7TNB par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
P5020NSE7TNB - QorIQ Dual-Core PowerPC SoC 2.0GHz | NXP
P5020NSE7TNB ⚠ Dernier achatNXP Semiconductors
P5020NXE7TNB - QorIQ P5020 Dual-Core 2GHz SoC MPU | NXP
P5020NXE7TNB ⚠ Dernier achatComparaison des spécifications
| Paramètre | P5020NSE7TNB | P5020NXE7TNB |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $199,50 | $442,25 |
| Core Architecture | Power Architecture e5500 (64-bit) | Power Architecture e5500, 64-bit |
| Number of Cores | 2 (Dual-Core) | 2 |
| Maximum Core Frequency | 2.0 GHz | 2.0 GHz |
| Series | QorIQ P5 | — |
| Co-Processors / Accelerators | SEC 4.2, Pattern Matching Engine | — |
| Memory Controller | DDR3 / DDR3L with ECC | DDR3 / DDR3L with ECC |
| Graphics Acceleration | No | — |
| Ethernet | Up to 10 Gbps (multiple GbE interfaces) | — |
| PCIe | PCIe Gen2 controllers | — |
| Serial RapidIO (SRIO) | Yes | — |
| Hardware Acceleration | Pattern Matching, SEC | Pattern matching, queue management, cryptography |
| Température de fonctionnement | 0°C to +105°C | — |
| Boîtier | 1295-FCPBGA (37.5 x 37.5 mm) | 1295-ball FCBGA (FC-PBGA 37.5x37.5 mm) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Part Status | Not For New Designs (EOL announced) | — |
| Bus Width | 64-bit | — |
| PCI Express | — | PCIe 2.0 controllers (x4/x2/x1) |
| Gigabit Ethernet | — | Multiple GbE interfaces; up to 10 GbE via XAUI |
| Serial RapidIO | — | Yes (SRIO) |
| Security Engine | — | SEC 4.0 |
| Plage de température de fonctionnement | — | -40C to +105C |
| Tension d'alimentation | — | [DATA_NEEDED: core/IO rail voltages] |
| Thermal Resistance (theta JA) | — | [DATA_NEEDED: theta JA from datasheet] |
| Statut RoHS | — | [DATA_NEEDED: per NXP product page] |
| Niveau MSL | — | [DATA_NEEDED: moisture sensitivity level] |
| Process Technology | — | [DATA_NEEDED: process node] |
| L2 Cache | — | [DATA_NEEDED: per-core L2 size] |