RTAX1000SL-1CGS624B vs RTAX1000SL-CGS624B Comparaison
Comparaison détaillée côte à côte de RTAX1000SL-1CGS624B par Microchip Technology et RTAX1000SL-CGS624B par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX1000SL-1CGS624B - Rad-Tolerant FPGA 1M Gates | Microchip
RTAX1000SL-1CGS624B ✓ ActifMicrochip Technology
RTAX1000SL-CGS624B - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624B ✓ ActifComparaison des spécifications
| Paramètre | RTAX1000SL-1CGS624B | RTAX1000SL-CGS624B |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | RF Transceivers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 200,00 | $1 390,00 |
| Logic Density | 1,000,000 equivalent system gates | — |
| ASIC Gates | 125,000 additional ASIC gates | 125,000 gates |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Series | RTAX1000SL | — |
| Speed Grade | -1 | B |
| Technology | Digital CMOS | 0.15 um CMOS, anti-fuse |
| Programming Technology | Anti-fuse (one-time programmable, live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Boîtier | 624-ball Ceramic CGA (CGS624) | 624-pin CCGA (CGS624) |
| Type de montage | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space flight qualified) | — |
| Qualification | DLA SMD 5962-0422006QUA per MIL-PRF-38535 | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Tension d'alimentation | [DATA_NEEDED: core/IO supply voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Architecture Base | Derived from Microsemi commercial Axcelerator family | — |
| Equivalent System Gates | — | 1,000,000 gates |
| Combinational Cells (CLBs) | — | 12096 |
| Core Supply Voltage | — | 1.5 V |
| Maximum System Frequency | — | 581 MHz |
| Embedded SRAM | — | Yes, with built-in FIFO control logic |
| Configuration | — | Live-at-power-up (anti-fuse, single chip) |
| Clock Features | — | Segmentable clocks, chip-wide highway routing |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |