RTAX1000SL-1CGS624B vs RTAX1000SL-CGS624B 비교
다음의 상세 나란히 비교: RTAX1000SL-1CGS624B 제조: Microchip Technology 및 RTAX1000SL-CGS624B 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
RTAX1000SL-1CGS624B - Rad-Tolerant FPGA 1M Gates | Microchip
RTAX1000SL-1CGS624B ✓ 활성Microchip Technology
RTAX1000SL-CGS624B - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624B ✓ 활성사양 비교
| 파라미터 | RTAX1000SL-1CGS624B | RTAX1000SL-CGS624B |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | RF Transceivers |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $3,200.00 | $1,390.00 |
| Logic Density | 1,000,000 equivalent system gates | — |
| ASIC Gates | 125,000 additional ASIC gates | 125,000 gates |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Series | RTAX1000SL | — |
| Speed Grade | -1 | B |
| Technology | Digital CMOS | 0.15 um CMOS, anti-fuse |
| Programming Technology | Anti-fuse (one-time programmable, live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| 패키지 | 624-ball Ceramic CGA (CGS624) | 624-pin CCGA (CGS624) |
| 실장 유형 | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space flight qualified) | — |
| Qualification | DLA SMD 5962-0422006QUA per MIL-PRF-38535 | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 공급 전압 | [DATA_NEEDED: core/IO supply voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Architecture Base | Derived from Microsemi commercial Axcelerator family | — |
| Equivalent System Gates | — | 1,000,000 gates |
| Combinational Cells (CLBs) | — | 12096 |
| Core Supply Voltage | — | 1.5 V |
| Maximum System Frequency | — | 581 MHz |
| Embedded SRAM | — | Yes, with built-in FIFO control logic |
| Configuration | — | Live-at-power-up (anti-fuse, single chip) |
| Clock Features | — | Segmentable clocks, chip-wide highway routing |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |