RTAX2000D-CQ352B vs RTAX2000DL-1CQ352E Comparaison
Comparaison détaillée côte à côte de RTAX2000D-CQ352B par Microsemi et RTAX2000DL-1CQ352E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microsemi
RTAX2000D-CQ352B - 2M-Gate Rad-Tolerant FPGA, CQFP-352 | Microchip
RTAX2000D-CQ352B ✓ ActifMicrochip Technology
RTAX2000DL-1CQ352E - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-1CQ352E ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000D-CQ352B | RTAX2000DL-1CQ352E |
|---|---|---|
| Marque | Microsemi | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 100,00 | $2 300,00 |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-DSP / RTAX-SL radiation-tolerant FPGAs |
| Equivalent System Gates | 2000000 | 2000000 gates |
| Logic Cells | 29568 | 29568 |
| CLBs | 19712 | — |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | 1.5 V nominal (1.425 V to 1.575 V) |
| Process Technology | CMOS antifuse | — |
| Configuration Type | One-time programmable antifuse, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Boîtier | CQFP-352 ceramic quad flat pack | 352-terminal CQFP (Ceramic Quad Flat Pack), column E lead finish |
| Screening / Speed Grade | B (burn-in screening); D suffix = tighter ICCA limits at 125C final test | — |
| Type de montage | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per family datasheet) | — |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: Operating Temperature Range] | [DATA_NEEDED: operating temperature range] |
| I/O Supply Voltage | [DATA_NEEDED: I/O Bank Supply Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O Count] | — |
| Configurable Logic Blocks (CLBs) | — | 19712 |
| DSP Mathblocks | — | Up to 120 |
| DSP MAC Performance | — | 125 MHz 18-bit x 18-bit multiply-accumulate |
| Technology | — | Digital CMOS, antifuse (nonvolatile, one-time programmable) |
| Total Ionizing Dose (Functional) | — | 300 krad(Si) |
| Total Ionizing Dose (Parametric rating) | — | 200 krad(Si) |
| User I/O | — | 166 input and 166 output terminals |
| Configuration | — | Live at power-up, no external configuration device |
| Speed Grade | — | -1 (standard) |