RTAX2000D-CQ352B vs RTAX2000DL-1CQ352E Vergleich
Detaillierter Direktvergleich von RTAX2000D-CQ352B von Microsemi und RTAX2000DL-1CQ352E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microsemi
RTAX2000D-CQ352B - 2M-Gate Rad-Tolerant FPGA, CQFP-352 | Microchip
RTAX2000D-CQ352B ✓ AktivMicrochip Technology
RTAX2000DL-1CQ352E - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-1CQ352E ✓ AktivSpezifikationsvergleich
| Parameter | RTAX2000D-CQ352B | RTAX2000DL-1CQ352E |
|---|---|---|
| Marke | Microsemi | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.100,00 | $2.300,00 |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-DSP / RTAX-SL radiation-tolerant FPGAs |
| Equivalent System Gates | 2000000 | 2000000 gates |
| Logic Cells | 29568 | 29568 |
| CLBs | 19712 | — |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | 1.5 V nominal (1.425 V to 1.575 V) |
| Process Technology | CMOS antifuse | — |
| Configuration Type | One-time programmable antifuse, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Gehäuse | CQFP-352 ceramic quad flat pack | 352-terminal CQFP (Ceramic Quad Flat Pack), column E lead finish |
| Screening / Speed Grade | B (burn-in screening); D suffix = tighter ICCA limits at 125C final test | — |
| Montageart | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per family datasheet) | — |
| RoHS-Status | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| Betriebstemperatur | [DATA_NEEDED: Operating Temperature Range] | [DATA_NEEDED: operating temperature range] |
| I/O Supply Voltage | [DATA_NEEDED: I/O Bank Supply Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O Count] | — |
| Configurable Logic Blocks (CLBs) | — | 19712 |
| DSP Mathblocks | — | Up to 120 |
| DSP MAC Performance | — | 125 MHz 18-bit x 18-bit multiply-accumulate |
| Technology | — | Digital CMOS, antifuse (nonvolatile, one-time programmable) |
| Total Ionizing Dose (Functional) | — | 300 krad(Si) |
| Total Ionizing Dose (Parametric rating) | — | 200 krad(Si) |
| User I/O | — | 166 input and 166 output terminals |
| Configuration | — | Live at power-up, no external configuration device |
| Speed Grade | — | -1 (standard) |