RTAX2000DL-1CQ352V vs RTAX2000DL-CQ352V Comparaison
Comparaison détaillée côte à côte de RTAX2000DL-1CQ352V par Microchip Technology et RTAX2000DL-CQ352V par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000DL-1CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-1CQ352V ✓ ActifMicrochip Technology
RTAX2000DL-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-CQ352V ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000DL-1CQ352V | RTAX2000DL-CQ352V |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 950,00 | $0,00 |
| Family | RTAX-DSP (RTAX2000DL) | RTAX-DSP (RTAX-S/SL and RTAX-DSP radiation-tolerant FPGAs) |
| Equivalent System Gates | 2,000,000 (approx.) | 2,000,000 |
| Logic Cells | 29,568 | 29,568 |
| CLBs | 19,712 | 19,712 |
| Core Supply Voltage | 1.425 V to 1.575 V (nominal 1.5 V) | 1.5 V nominal (1.425 V to 1.575 V) |
| Technology | Digital CMOS | CMOS, antifuse (nonvolatile, one-time programmable) |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant (RTAX-DSP) | — |
| Configuration | Live at power-up, no external boot memory | Live-at-power-up (antifuse, no external boot device) |
| Speed Grade | -1 | — |
| Boîtier | CQ352 (352-pin ceramic QFP) | CQFP-352, hermetically sealed ceramic, metal-sealed cofired |
| Type de montage | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Special Features | DSP multiply-accumulate blocks (DL variant) | — |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | — |
| Température de fonctionnement | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| Embedded SRAM | [DATA_NEEDED: Embedded SRAM capacity] | — |
| DSP Mathblocks | — | Up to 120 (18-bit x 18-bit MAC, up to 125 MHz) |
| Embedded Memory | — | Up to 540 kbits SRAM with optional EDAC |
| Maximum Combinatorial Delay | — | 1.100 ns |
| Total Ionizing Dose (TID) | — | 300 krad (functional); 200 krad (per family data) |
| Terminal Pitch | — | 0.500 mm |