RTAX4000S-1CQ352V vs RTAX4000S-CQ352V Comparaison

Comparaison détaillée côte à côte de RTAX4000S-1CQ352V par Microchip Technology et RTAX4000S-CQ352V par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Microchip Technology
RTAX4000S-1CQ352V RTAX4000S-1CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000S-1CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000S-1CQ352V ✓ Actif
Microchip Technology
RTAX4000S-CQ352V RTAX4000S-CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000S-CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000S-CQ352V ✓ Actif

Comparaison des spécifications

Paramètre RTAX4000S-1CQ352V RTAX4000S-CQ352V
Marque Microchip Technology Microchip Technology
Catégorie FPGA & CPLD FPGA & CPLD
Statut du cycle de vie Actif Actif
Statut du stock In Stock In Stock
Prix unitaire (USD) $0,00 $0,00
Equivalent System Gates 4,000,000 gates 4,000,000 gates
Logic Cells 60,480 60,480
Combinational Logic Blocks (CLBs) 40,320 —
User I/Os 166 —
Configuration Technology Antifuse (OTP), live at power-up —
Radiation Tolerance Radiation-tolerant (RTAX-S family, space-flight grade) Radiation-tolerant (space-flight grade)
Family RTAX-S/SL and RTAX-DSP RTAX-S/SL Radiation-Tolerant FPGAs
Embedded Memory Embedded SRAM with built-in FIFO control logic Embedded SRAM with built-in FIFO control logic
Speed Grade -1 —
Boîtier CQ352 (352-pin ceramic quad flat package) CQ352 (352-pin ceramic column grid array)
Type de montage Surface Mount —
Operating Temperature Min -55 C —
Operating Temperature Max +125 C —
Process Technology CMOS —
Clocking Segmentable clocks, chip-wide highway routing —
Typical Applications Space-flight systems, satellites —
Statut RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Combinational Logic Blocks — 40,320
Technology — CMOS, antifuse (OTP)
Configuration — Live at power-up, single-chip, no external configuration device
Clock Resources — Segmentable clocks, chip-wide highway routing
Architecture Base — Axcelerator commercial FPGA family
Application Domain — Space-flight systems
Température de fonctionnement — [DATA_NEEDED: operating temperature range]
Tension d'alimentation — [DATA_NEEDED: core supply voltage]
Max User I/O — [DATA_NEEDED: maximum user I/O count for CQ352]
Screening — Standard vs SL variant distinguished by ICCA limits at 125C final electrical test

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