XC3090L-8PCG84C vs XC3090LTM-8PC84C Comparaison
Comparaison détaillée côte à côte de XC3090L-8PCG84C par Xilinx et XC3090LTM-8PC84C par Xilinx. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC3090L-8PCG84C | XC3090LTM-8PC84C |
|---|---|---|
| Marque | Xilinx | Xilinx |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,10 | $43,25 |
| Family | XC3000A/L Series FPGA | XC3000L Low Voltage Logic Cell Array |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | — |
| Gate Count | 6,400 gates (typical) | — |
| Configuration Program Store | 64,160 bits | — |
| User I/O Pins | 70 (maximum) | — |
| Boîtier | 84-pin PLCC (J-Lead, PCG84) | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | — |
| Speed Grade | -8 (moderate) | -8 (per suffix; see device decoder) |
| Température de fonctionnement | 0 C to +70 C (commercial 'C' suffix) | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | — |
| Process Technology | [DATA_NEEDED: process node] | 0.8 um CMOS SRAM-based |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | — |
| Type de montage | Surface Mount (PLCC J-Lead) | Surface Mount (PLCC socket-compatible) |
| Statut RoHS | unknown | unknown |
| Lead-Free | unknown | unknown |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Technology | SRAM-based, in-system reconfigurable | — |
| Logic Cells / Gates | — | ~6,000 usable gates |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Configuration Memory | — | 64,160 bits (distributed SRAM) |
| Configuration Method | — | External EEPROM/EPROM/ROM/master/microprocessor mode |
| Core Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| Nombre de broches | — | 84 |
| Maximum Toggle Frequency | — | [DATA_NEEDED: specific fmax value] |
| Logic Block Delays | — | [DATA_NEEDED: typical TBU/TPIO delay] |
| I/O Standard Support | — | TTL/CMOS 3.3 V (5 V tolerant with restrictions) |
| Programming Toolchain | — | XACT / Foundation (legacy, EOL software) |