ATMEGA3250P-20AU - AVR 8-bit MCU 20MHz 32KB TQFP-100 | Microchip
Référence : ATMEGA3250P-20AU ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $2.49 | $2,49 |
| 10 | $2.35 | $23,50 |
| 100 | $2.1 | $210,00 |
| 500 | $1.95 | $975,00 |
| 1 000 | $1.8 | $1 800,00 |
ATMEGA3250P-20AU Présentation
A microcontroller unit (MCU) is a single integrated circuit that combines a processor core, memory, and programmable input/output peripherals, sitting at the top of the embedded control hierarchy from simple logic ICs up to full system-on-chip solutions. The AVR family popularized single-cycle RISC execution, and this ATmega device executes 131 powerful instructions, most in a single clock cycle, achieving up to 20 MIPS throughput at 20 MHz.
Key features include 69 general-purpose I/O lines with internal pull-ups, a JTAG interface for boundary-scan, on-chip debugging and programming, three flexible timer/counters with compare modes, an 8-channel 10-bit ADC, and a programmable serial USART. The picoPower technology delivers low active and sleep-mode consumption, with six software-selectable power-saving modes including idle, power-save, power-down, standby, ADC noise reduction, and extended standby.
Architecturally, the device uses a Harvard structure with separate program and data buses, 32 general-purpose working registers directly connected to the ALU, and read-while-write flash for in-system self-programming. Endurance is rated at 10,000 flash and 100,000 EEPROM write/erase cycles with 20-year data retention at 85C.
Typical applications include industrial automation controllers, building and HVAC control panels, metering systems, and consumer appliances where a 5V industrial noise margin and abundant I/O are required.
For design, ensure the supply is decoupled with 100 nF ceramics at each VCC/GND pair and drive AVCC properly even when the ADC is unused. Pricing on this page reflects distributor data as of 2026-09-17; this page adds drop-in alternatives, pinout guidance, and design notes not consolidated in the manufacturer datasheet.
Alternatives de remplacement direct pour ATMEGA3250P-20AU — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec ATMEGA3250P-20AU (même facteur de forme et même empreinte) — différant par Package, Instructions, Operating Temperature, RoHS Status, General Purpose I/O.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
ATMEGA3250PA-AU
✅ Remplacement direct✓ En stock
$4.43 / unité
Voir la fiche technique →ATMEGA3250-16AU
✅ Remplacement direct✓ En stock
$5.74 / unité
Voir la fiche technique →ATMEGA3290P-20AU
✅ Remplacement direct✓ En stock
$9.62 / unité
Voir la fiche technique →ATMEGA6450-20AU
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
ATMEGA1280-16AU
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
ATMEGA3250P-20AU Valeurs maximales et caractéristiques électriques
| Core Processor | AVR |
| Core Size | 8-Bit |
| Speed | 20 MHz |
| Flash Memory Size | 32 KB (16K x 16) |
| SRAM Size | 2 KB |
| EEPROM Size | 1 KB |
| Supply Voltage Range | 4.5 V to 5.5 V |
| Number of I/O | 69 |
| Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Connectivity | SPI, UART/USART, JTAG |
| ADC Resolution | 10-bit |
| Température de fonctionnement | -40C to +85C |
| Boîtier | 100-TQFP (14x14 mm), 0.8 mm pitch |
| Type de montage | Surface Mount |
| Program Memory Type | FLASH |
| RAM Size | 2 KB |
| Statut du cycle de vie | ACTIVE |
Configuration des broches de ATMEGA3250P-20AU
| Broche 1 | PG5 (OC0B) — Port G bit 5 / Timer0 output compare B |
| Broche 2 | PG4 (TOSC1) — Port G bit 4 / 32 kHz oscillator input |
| Broche 3 | PG3 (TOSC2) — Port G bit 3 / 32 kHz oscillator output |
| Broche 4 | RESET — Active-low reset input |
| Broche 5 | VCC — Digital supply voltage |
| Broche 6 | GND — Ground |
| Broche 7 | XTAL2 — Main oscillator output |
| Broche 8 | XTAL1 — Main oscillator input |
| Broche 9 | PF0 (ADC0) — Port F bit 0 / ADC channel 0 |
| Broche 10 | PF1 (ADC1) — Port F bit 1 / ADC channel 1 |
| Broche 11 | PF2 (ADC2) — Port F bit 2 / ADC channel 2 |
| Broche 12 | PF3 (ADC3) — Port F bit 3 / ADC channel 3 |
| Broche 13 | PF4 (ADC4/TCK) — Port F bit 4 / ADC4 / JTAG test clock |
| Broche 14 | PF5 (ADC5/TMS) — Port F bit 5 / ADC5 / JTAG test mode select |
| Broche 15 | PF6 (ADC6/TDO) — Port F bit 6 / ADC6 / JTAG test data out |
| Broche 16 | PF7 (ADC7/TDI) — Port F bit 7 / ADC7 / JTAG test data in |
| Broche 17 | PG0 (ALE) — Port G bit 0 / external memory address latch enable |
| Broche 18 | PG1 (RD) — Port G bit 1 / external memory read strobe |
| Broche 19 | PG2 (WR) — Port G bit 2 / external memory write strobe |
| Broche 20 | PA0 (AD0) — Port A bit 0 / external memory address/data 0 |
| Broche 21 | PA1 (AD1) — Port A bit 1 / address/data 1 |
| Broche 22 | PA2 (AD2) — Port A bit 2 / address/data 2 |
| Broche 23 | PA3 (AD3) — Port A bit 3 / address/data 3 |
| Broche 24 | PA4 (AD4) — Port A bit 4 / address/data 4 |
| Broche 25 | PA5 (AD5) — Port A bit 5 / address/data 5 |
| Broche 26 | PA6 (AD6) — Port A bit 6 / address/data 6 |
| Broche 27 | PA7 (AD7) — Port A bit 7 / address/data 7 |
| Broche 28 | PC0 (A8) — Port C bit 0 / external memory address 8 |
| Broche 29 | PC1 (A9) — Port C bit 1 / address 9 |
| Broche 30 | PC2 (A10) — Port C bit 2 / address 10 |
| Broche 31 | PC3 (A11) — Port C bit 3 / address 11 |
| Broche 32 | PC4 (A12) — Port C bit 4 / address 12 |
| Broche 33 | PC5 (A13) — Port C bit 5 / address 13 |
| Broche 34 | PC6 (A14) — Port C bit 6 / address 14 |
| Broche 35 | PC7 (A15) — Port C bit 7 / address 15 |
| Broche 36 | PD0 (SCL/INT0) — Port D bit 0 / TWI clock / external interrupt 0 |
| Broche 37 | PD1 (SDA/INT1) — Port D bit 1 / TWI data / external interrupt 1 |
| Broche 38 | PD2 (RXD1/INT2) — Port D bit 2 / USART1 receive / external interrupt 2 |
| Broche 39 | PD3 (TXD1/INT3) — Port D bit 3 / USART1 transmit / external interrupt 3 |
| Broche 40 | PD4 (ICP1) — Port D bit 4 / Timer1 input capture |
| Broche 41 | PD5 (XCK1) — Port D bit 5 / USART1 external clock |
| Broche 42 | PD6 (T1) — Port D bit 6 / Timer1 external counter input |
| Broche 43 | PD7 (T2) — Port D bit 7 / Timer2 external counter input |
| Broche 44 | PE0 (PDI/RXD0) — Port E bit 0 / programming data in / USART0 receive |
| Broche 45 | PE1 (PDO/TXD0) — Port E bit 1 / programming data out / USART0 transmit |
| Broche 46 | PE2 (XCK0/AIN0) — Port E bit 2 / USART0 clock / analog comparator 0 input |
| Broche 47 | PE3 (AIN1/OC3A) — Port E bit 3 / comparator 1 input / Timer3 output compare A |
| Broche 48 | PE4 (OC3B/INT4) — Port E bit 4 / Timer3 compare B / external interrupt 4 |
| Broche 49 | PE5 (OC3C/INT5) — Port E bit 5 / Timer3 compare C / external interrupt 5 |
| Broche 50 | PE6 (T3/INT6) — Port E bit 6 / Timer3 external clock / external interrupt 6 |
| Broche 51 | PE7 (ICP3/INT7) — Port E bit 7 / Timer3 capture / external interrupt 7 |
| Broche 52 | PB0 (SS) — Port B bit 0 / SPI slave select |
| Broche 53 | PB1 (SCK) — Port B bit 1 / SPI clock |
| Broche 54 | PB2 (MOSI) — Port B bit 2 / SPI master data out |
| Broche 55 | PB3 (MISO) — Port B bit 3 / SPI master data in |
| Broche 56 | PB4 (OC2A/PCINT4) — Port B bit 4 / Timer2 compare A / pin change interrupt |
| Broche 57 | PB5 (OC1A/PCINT5) — Port B bit 5 / Timer1 compare A / pin change interrupt |
| Broche 58 | PB6 (OC1B/PCINT6) — Port B bit 6 / Timer1 compare B / pin change interrupt |
| Broche 59 | PB7 (OC2B/OC1C) — Port B bit 7 / Timer2 compare B / Timer1 compare C |
| Broche 60 | PH0 (RXD2) — Port H bit 0 / USART2 receive |
| Broche 61 | PH1 (TXD2) — Port H bit 1 / USART2 transmit |
| Broche 62 | PH2 (XCK2) — Port H bit 2 / USART2 external clock |
| Broche 63 | PH3 (OC4A) — Port H bit 3 / Timer4 output compare A |
| Broche 64 | PH4 (OC4B) — Port H bit 4 / Timer4 output compare B |
| Broche 65 | PH5 (OC4C) — Port H bit 5 / Timer4 output compare C |
| Broche 66 | PH6 (OC2B) — Port H bit 6 / Timer2 output compare B |
| Broche 67 | PH7 (T4) — Port H bit 7 / Timer4 external clock input |
| Broche 68 | PG4 (TOSC1) — Port G bit 4 (second location on 100-pin package) / RTC oscillator input - verify against datasheet |
| Broche 69 | PG3 (TOSC2) — Port G bit 3 (second location) / RTC oscillator output - verify against datasheet |
| Broche 70 | VCC — Digital supply voltage |
| Broche 71 | GND — Ground |
| Broche 72 | PJ0 — Port J bit 0 |
| Broche 73 | PJ1 — Port J bit 1 |
| Broche 74 | PJ2 — Port J bit 2 |
| Broche 75 | PJ3 — Port J bit 3 |
| Broche 76 | PJ4 — Port J bit 4 |
| Broche 77 | PJ5 — Port J bit 5 |
| Broche 78 | PJ6 — Port J bit 6 |
| Broche 79 | PJ7 — Port J bit 7 |
| Broche 80 | PL0 (ICP4) — Port L bit 0 / Timer4 input capture |
| Broche 81 | PL1 (ICP5) — Port L bit 1 / Timer5 input capture |
| Broche 82 | PL2 (T5) — Port L bit 2 / Timer5 external clock input |
| Broche 83 | PL3 (OC5A) — Port L bit 3 / Timer5 output compare A |
| Broche 84 | PL4 (OC5B) — Port L bit 4 / Timer5 output compare B |
| Broche 85 | PL5 (OC5C) — Port L bit 5 / Timer5 output compare C |
| Broche 86 | PL6 — Port L bit 6 |
| Broche 87 | PL7 — Port L bit 7 |
| Broche 88 | PD0 — Port D bit 0 (alternate location on 100-pin package) - verify against datasheet |
| Broche 89 | PD1 — Port D bit 1 (alternate location) - verify against datasheet |
| Broche 90 | PD2 — Port D bit 2 (alternate location) - verify against datasheet |
| Broche 91 | PD3 — Port D bit 3 (alternate location) - verify against datasheet |
| Broche 92 | PD4 — Port D bit 4 (alternate location) - verify against datasheet |
| Broche 93 | PD5 — Port D bit 5 (alternate location) - verify against datasheet |
| Broche 94 | PD6 — Port D bit 6 (alternate location) - verify against datasheet |
| Broche 95 | PD7 — Port D bit 7 (alternate location) - verify against datasheet |
| Broche 96 | AVCC — Analog supply voltage for ADC |
| Broche 97 | AREF — Analog reference voltage |
| Broche 98 | AC0/PE2 — Analog comparator input / Port E alternate - verify against datasheet |
| Broche 99 | GND — Ground (exposed on 100-pin layout) |
| Broche 100 | VCC — Digital supply voltage |
Applications typiques
ATMEGA3250P-20AU convient pour 6 applications: Industrial Automation Controllers, Building and HVAC Control Panels, Utility Metering and Data Loggers, Consumer Appliance Control, Security and Access Control Systems, Test and Measurement Instrumentation.
Industrial Automation Controllers
The ATMEGA3250P-20AU fits industrial automation controller boards because its 69 GPIO lines drive relay banks, contactors, stack lights, and HMI keypads directly, while the -40C to +85C industrial temperature rating and 4.5V-5.5V supply tolerate noisy 5V logic environments. Its 20 MHz AVR core executes 131 mostly single-cycle instructions, giving deterministic timing for PLC-style scan loops, and the watchdog plus brown-out reset recover reliably from power dips common on factory floors. Typically placed as the main control IC with a MAX232-class transceiver for RS-485/RS-232 fieldbus links; the JTAG port enables in-circuit debugging and boundary-scan manufacturing test. The trade-off is 32 KB flash, so complex protocol stacks require careful code optimization.
Recommandé
Building and HVAC Control Panels
In building automation and HVAC control panels, the ATMEGA3250P-20AU supplies the abundant I/O (69 lines) needed for zone valve outputs, fan speed relays, damper actuators, and multi-button keypads in one low-cost 5V IC. The 8-channel 10-bit ADC digitizes NTC thermistors and 0-10V sensor inputs (via dividers) with ratiometric accuracy, while three timer/counters generate PWM for triac or SSR-based heater and fan control. PicoPower sleep modes let a panel stay responsive on interrupt wake-ups while minimizing standby draw. Designers pair it with a real-time clock such as the DS1307 over I2C-bit-banged SPI/GPIO for scheduling; the main consideration is flash budget for communication stacks and display drivers.
Recommandé
Utility Metering and Data Loggers
Energy, water, and gas metering electronics benefit from the ATMEGA3250P-20AU's combination of a 10-bit ADC for current-transformer or shunt sensing, 1 KB EEPROM for calibration constants and billing registers, and six power-saving modes for battery-backed operation. The 32 KB flash accommodates measurement algorithms plus pulse-counting and communication firmware, and EEPROM endurance of 100,000 write cycles supports frequent accumulation logging. Its 5V rail matches optically isolated pulse outputs commonly found in meters. The USART streams data to GSM/RS-485 modems for AMR (automatic meter reading). Designers should reserve EEPROM wear-leveling in firmware and use the ADC noise reduction sleep mode ahead of each conversion for best resolution.
Recommandé
Consumer Appliance Control
Washing machines, dishwashers, ovens, and other white-goods appliances use the ATMEGA3250P-20AU as a main board controller where its wide 69-I/O array handles touch keys, LED segments, motor relays, door locks, and buzzer outputs without port expanders. Operating directly on the appliance's 5V derived rail with brown-out protection and watchdog supervision, it meets the reliability expectations of mains-powered household equipment, and the -40C to +85C range covers unheated garage installations. Timer PWM channels control universal motor triacs and brushless driver stages, while the ADC reads NTC temperature probes. Cost pressure makes the roughly $2.49 single-unit price (as of 2026-09-17) attractive versus 32-bit MCUs for this class of product.
Recommandé
Security and Access Control Systems
Access control panels, alarm hubs, and door controllers leverage the ATMEGA3250P-20AU's JTAG-based boundary scan for production test, its 69 GPIO for keypad matrix, reader interfaces, relay outputs, and zone loops, and its EEPROM for credential storage. The 20 MHz speed grade provides headroom for Wiegand or clock-and-data reader decoding in interrupt service routines with precise timing, and the 10-bit ADC monitors tamper switches and backup-battery voltage. Firmware can implement rolling-code and encrypted challenge-response within the 32 KB flash using lightweight AVR cryptography libraries. Design the PCB with JTAG header provision for on-chip debugging, and configure the brown-out detector to protect credential EEPROM writes during mains failures.
Recommandé
Test and Measurement Instrumentation
Bench instruments, panel meters, and custom test fixtures use the ATMEGA3250P-20AU where a 5V industrial MCU with rich I/O simplifies front-panel keypads, LED/LCD drivers, relay mux control, and IEEE-style trigger handshakes. The 10-bit ADC plus ADC noise reduction mode supports basic measurement channels, while timer capture inputs measure frequency and pulse width with timer resolution down to 50 ns at 20 MHz. The JTAG on-chip debug interface shortens bring-up during instrument firmware development, and boundary scan verifies assembled boards without a bed-of-nails fixture. Its deterministic single-cycle RISC core makes timing-critical stimulus generation predictable; reserve SRAM carefully since only 2 KB is available for buffers.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour ATMEGA3250P-20AU — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | ATMEGA3250PA-AU | ATMEGA3250-16AU | ATMEGA3290P-20AU | ATMEGA6450-20AU | ATMEGA1280-16AU |
|---|---|---|---|---|---|---|
| Package | 100-TQFP (14x14 mm) | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB | 32 KB | 32 KB | 32 KB | 64 KB | 128 KB |
| SRAM | 2 KB | 2 KB | 2 KB | 2 KB | 4 KB | 8 KB |
| Maximum Clock Speed | 20 MHz | 20 MHz | 16 MHz | 20 MHz | 20 MHz | 16 MHz |
| Supply Voltage | 4.5 V to 5.5 V | 1.8 V to 5.5 V (derated) | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V |
| General Purpose I/O | 69 | 69 | 69 | 69 (shared with LCD) | 69 (shared with LCD) | 86 |
| On-chip LCD Controller | No | No | No | Yes | Yes | No |
| PicoPower Technology | Yes (P variant) | Yes (enhanced PA) | No (base grade) | Yes (P variant) | No (base grade) | No (base grade) |
Principaux différenciateurs
- 20 MHz speed grade (vs ATMEGA3250-16AU)
- No LCD overhead, full GPIO availability (vs ATMEGA3290P-20AU)
- Lowest memory in footprint - lowest cost (vs ATMEGA6450-20AU)
Notes de conception
Decouple every VCC/GND pair with a 100 nF X7R ceramic placed within 3 mm of the pin pair, plus one 4.7 uF to 10 uF bulk capacitor near the TQFP-100 package. Connect AVCC to VCC through a low-pass filter (10 ohm resistor plus 100 nF) even if the ADC is unused - the datasheet requires AVCC to be tied to the supply for correct digital operation. Enable the brown-out detector at approximately 4.0V (BODLEVEL fuse) on 5V systems so EEPROM writes are protected during supply sag.
The 100-pin TQFP with 0.8 mm pitch requires careful escape routing; place the JTAG (TCK/TMS/TDO/TDI on port F) header near the chip edge for debug access. Keep the XTAL1/XTAL2 crystal loop compact with guard ground, and route the analog port F traces away from switching relay or motor drive lines on port L. Use a solid ground plane on layer 2 and stitch vias around the crystal and ADC reference (AREF) area to limit ground bounce at 20 MHz operation.
The -20AU is a 5V-only part: do not substitute a 3.3V-supplied equivalent without also derating the clock. When migrating firmware from non-P ATmega parts, recheck fuse defaults (clock source, JTAGEN, BODLEVEL) because picoPower variants may ship with different factory fuses, causing a board that appears dead. Also remember RESET doubles as a high-voltage programming pin; never load it with more than a weak pull-up if you may need parallel HV recovery programming.
Informations de conformité
AU suffix designates RoHS-compliant, lead-free matte-tin TQFP package per Microchip ordering code convention. REACH and halogen-free status not stated in retrieved data.
