MaxLinear

CDK1308BILP40 - 10-bit 40MSPS Ultra-Low Power ADC | MaxLinear

Référence : CDK1308BILP40 ✓ Actif
En stock Expédié sous 1 à 3 jours ouvrés
1.8 V Vdss 40-pin QFN (LP40) Package 40 MSPS Speed
À partir de $3.58 USD / unité
MOQ : 1 |
Prix mis à jour : 2026-10-12
Tarifs dégressifs
Qté Prix unitaire Total
1 $5.92 $5,92
10 $5.28 $52,80
100 $4.62 $462,00
500 $4.1 $2 050,00
1 000 $3.58 $3 580,00
ℹ️ Tous les prix sont en USD

CDK1308BILP40 Présentation

The MaxLinear (formerly Exar Corporation) CDK1308BILP40 is a 10-bit, 40 MSPS ultra-low-power analog-to-digital converter (ADC) housed in a 40-pin QFN package (LP40). The CDK1308 family is offered in four speed grades (20/40/65/80 MSPS), and the BILP40 suffix denotes the 40 MSPS speed grade with industrial temperature range.

An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that converts continuous-time, continuous-amplitude analog signals into discrete digital codes. Within the broader signal chain hierarchy, ADCs sit between analog front-end conditioning (amplifiers, anti-alias filters) and digital processing (FPGA, microcontroller, DSP), making them a critical component in data acquisition systems, imaging, and communications equipment. Ultra-low-power ADCs such as the CDK1308 target portable and battery-powered applications where milliwatts-per-sample directly impact battery life and thermal budgets.

Key features include 25 mW typical power dissipation at 40 MSPS, 61.6 dB SNR at an 8 MHz analog input, internal reference circuitry (eliminating external reference components), a 1.8 V analog core supply, and a separate 1.7 V to 3.6 V digital I/O supply for flexible host interfacing. The device uses a proprietary CMOS architecture with digital error correction, delivering high linearity while keeping die area and power low. Parallel CMOS outputs simplify connection to FPGAs, ASICs, and microcontrollers without requiring an external serializer.

The CDK1308B is pin-compatible with the CDK1307 family, enabling system scalability between 10-bit (CDK1308) and 12-bit (CDK1307) resolutions on the same PCB. This makes the part attractive for medical imaging, portable test equipment, digital oscilloscopes, and IF communications designs where a single hardware platform must support multiple performance tiers.

Typical applications span handheld ultrasound front-ends, digital oscilloscopes, IF sampling for software-defined radio (SDR), and portable industrial inspection cameras. The combination of low power, small QFN footprint, and internal reference simplifies multi-channel designs where board area and BOM cost are constrained.

When designing with the CDK1308BILP40, decouple AVDD and DVDD separately with 1 µF and 100 nF capacitors placed as close to the pins as possible. Drive the analog input through a wideband op-amp or transformer; the input is a switched-capacitor structure that benefits from a low-impedance source to preserve SNR at high input frequencies.

Alternatives de remplacement direct pour CDK1308BILP40 — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.

Variantes de cette série

Modèles de la même série directement compatibles avec CDK1308BILP40 (même facteur de forme et même empreinte) — différant par Architecture, Package, Resolution, Manufacturer, Reference.

MaxLinear
Architecture: Multi-stage pipeline with digital error correction
Package: 40-pin LQFP (LP)
Resolution: 12-bit / 13-bit selectable
Comparer avec CDK1308BILP40 →
MaxLinear
Architecture: Proprietary, digital error correction
Package: 40-pin QFN
Resolution: 10 bit
Comparer avec CDK1308BILP40 →
MaxLinear
Architecture: Pipeline
Package: LQFP-40
Resolution: 10 bit
Comparer avec CDK1308BILP40 →

Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :

CDK1307CILP40

✅ Remplacement direct
MaxLinear
📦 40-pin QFN (LP40)
CDK1307CILP40 · MaxLinear (formerly Exar/Cadeka) · Analog-to-Digital Converter (ADC) · 12-bit / 13-bit selectable · 65 MSPS (family supports 20/40/65/80 MSPS) · Multi-stage pipeline with digital error correction · Single-ended analog input · 1 Vpp typical

✓ En stock

$3.95 / unité

Voir la fiche technique →

CDK1308AILP20

✅ Remplacement direct
📦 40-pin QFN (LP40)
20 MSPS max sample rate (vs 40 MSPS, -50%); same 10-bit, same LP40 footprint; pin-compatible family

📋 Alternative de référence (hors catalogue)

CDK1308CILP65

✅ Remplacement direct
📦 40-pin QFN (LP40)
65 MSPS max sample rate (vs 40 MSPS, +62%); same 10-bit, same LP40 footprint; pin-compatible family

📋 Alternative de référence (hors catalogue)

CDK1308CILP80

✅ Remplacement direct
📦 40-pin QFN (LP40)
80 MSPS max sample rate (vs 40 MSPS, +100%); same 10-bit, same LP40 footprint; pin-compatible family

📋 Alternative de référence (hors catalogue)

ℹ️ 1 référence(s) à boîtier différent masquée(s) — un boîtier différent exige une retouche du PCB et ne constitue pas un remplacement direct. Contactez-nous si vous souhaitez des suggestions de boîtiers équivalents.

CDK1308BILP40 Valeurs maximales et caractéristiques électriques

Résolution 10 bits
Sampling Rate (BILP40 speed grade) 40 MSPS
Family Speed Grades 20 / 40 / 65 / 80 MSPS
Power Dissipation 25 mW (typical at 40 MSPS)
SNR 61.6 dB at Fin = 8 MHz
Analog Supply Voltage (AVDD) 1.8 V
Digital I/O Supply Voltage (DVDD) 1.7 V to 3.6 V
Reference Internal
Output Interface Parallel CMOS
Architecture Proprietary CMOS with digital error correction
Boîtier 40-pin QFN (LP40)
Pin Compatibility Pin-compatible with CDK1307 (12-bit) family
Input Type Single-ended analog input
Statut RoHS Compliant
Manufacturer Exar Corporation (now MaxLinear)

Configuration des broches de CDK1308BILP40

QFN-40 Package Pinout Diagram QFN-40 6x6mm, P0.5mm, EP 4.1x4.1mm, JEDEC MO-220. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 QFN-40
Broche 1 AVDD — Analog supply voltage (1.8 V)
Broche 2 GND — Ground
Broche 3 AIN — Analog input
Broche 4 AVDD — Analog supply voltage (1.8 V)
Broche 5 GND — Ground
Broche 6 REF — Internal reference decoupling
Broche 7 GND — Ground
Broche 8 CLKP — Clock input positive
Broche 9 CLKN — Clock input negative / complementary
Broche 10 DVDD — Digital I/O supply (1.7-3.6 V)
Broche 11 GND — Ground
Broche 12 D0 — Data output bit 0 (LSB)
Broche 13 D1 — Data output bit 1
Broche 14 D2 — Data output bit 2
Broche 15 D3 — Data output bit 3
Broche 16 D4 — Data output bit 4
Broche 17 D5 — Data output bit 5
Broche 18 D6 — Data output bit 6
Broche 19 D7 — Data output bit 7
Broche 20 D8 — Data output bit 8
Broche 21 D9 — Data output bit 9 (MSB)
Broche 22 GND — Ground
Broche 23 DVDD — Digital I/O supply (1.7-3.6 V)
Broche 24 OE — Output enable
Broche 25 GND — Ground
Broche 26 PD — Power-down control
Broche 27 GND — Ground
Broche 28 NC — Not connected (per datasheet)
Broche 29 NC — Not connected (per datasheet)
Broche 30 AVDD — Analog supply voltage (1.8 V)
Broche 31 GND — Ground
Broche 32 NC — Not connected (per datasheet)
Broche 33 NC — Not connected (per datasheet)
Broche 34 AVDD — Analog supply voltage (1.8 V)
Broche 35 GND — Ground
Broche 36 NC — Not connected (per datasheet)
Broche 37 NC — Not connected (per datasheet)
Broche 38 AVDD — Analog supply voltage (1.8 V)
Broche 39 GND — Ground
Broche 40 EP — Exposed pad - thermal/ground connection

Applications typiques

CDK1308BILP40 convient pour 6 applications: Portable Digital Oscilloscope Front-End, Handheld Medical Imaging (Ultrasound / Doppler), IF Sampling for Software-Defined Radio (SDR), Portable Test & Measurement Equipment, Industrial Inspection Camera Digitizer, Low-Cost Communications IF Digitizer.

📺

Portable Digital Oscilloscope Front-End

The CDK1308BILP40 fits handheld oscilloscope front-ends where its 25 mW typical dissipation at 40 MSPS keeps the battery and thermal budget manageable. Its 61.6 dB SNR at 8 MHz input preserves signal fidelity when digitizing repetitive waveforms up to several MHz, while the parallel CMOS output avoids the latency and clock-recovery overhead of LVDS/serial interfaces. The internal reference eliminates a dedicated reference IC, reducing BOM cost on a tightly-packed multi-channel scope motherboard. The 40-pin QFN footprint with exposed pad enables compact layouts where every square millimeter matters.

💊

Handheld Medical Imaging (Ultrasound / Doppler)

In portable ultrasound carts, the CDK1308BILP40's 1.8 V analog supply and 25 mW dissipation reduce total system power and battery heating. Its 10-bit resolution and 61.6 dB SNR support diagnostic imaging of shallow structures when paired with a low-noise TGC amplifier. Parallel CMOS outputs stream samples directly into an FPGA beamformer without serializer-induced latency, which is critical for real-time B-mode imaging. Internal reference circuitry shrinks the per-channel BOM, supporting dense multi-element probe designs.

📻

IF Sampling for Software-Defined Radio (SDR)

The CDK1308BILP40's 40 MSPS sampling rate comfortably digitizes low-IF signals up to approximately 18 MHz (Nyquist), making it well-suited to amateur-radio and shortwave SDR receivers where 10-bit dynamic range is sufficient. Its 1.7-3.6 V digital I/O supply interfaces directly to 1.8 V or 3.3 V FPGA fabrics without level shifters, simplifying SDR shield designs. The internal reference and low power simplify battery-powered QRP portable SDR rigs.

🔧

Portable Test & Measurement Equipment

Handheld spectrum analyzers, logic-analyzer probes, and field-installable cable testers benefit from the CDK1308BILP40's 25 mW dissipation, which extends battery runtime between charges. The internal reference eliminates drift-inducing external references in field-temperature conditions. Parallel CMOS outputs can be multiplexed into an MCU DMA stream, simplifying the digital back-end on cost-sensitive test instruments. Pin compatibility with the CDK1307 family lets a single PCB serve both 10-bit and 12-bit product variants.

🎥

Industrial Inspection Camera Digitizer

In machine-vision and borescope inspection cameras, the CDK1308BILP40 digitizes analog video from CMOS image sensors at rates up to 40 MSPS, sufficient for standard-definition imaging pipelines. The 1.8 V core supply is compatible with modern low-voltage image sensors, reducing power-rail complexity. Its low heat output supports sealed, fan-less enclosures used in food, pharma, and hazardous-area inspection equipment.

🌐

Low-Cost Communications IF Digitizer

For narrowband IF strips in point-to-point microwave links and telemetry receivers, the CDK1308BILP40 offers 10-bit dynamic range with 25 mW dissipation, supporting dense multi-channel receiver designs. The internal reference and small QFN package enable compact daughtercards, while the parallel CMOS output simplifies connection to low-cost microcontrollers used in modem subsystems.

What is the resolution and maximum sampling rate of CDK1308BILP40?
The CDK1308BILP40 is a 10-bit analog-to-digital converter with a maximum sampling rate of 40 MSPS, as confirmed by the part suffix BILP40 (the ILP40 speed grade). The broader CDK1308B family is offered in four speed grades: 20, 40, 65, and 80 MSPS, allowing designers to scale performance within a single pin-compatible footprint. Source: MaxLinear CDK1308B product page.
What is the typical power dissipation of the CDK1308B at 40 MSPS?
The CDK1308BILP40 dissipates approximately 25 mW (typical) when operating at 40 MSPS from a 1.8 V analog supply. This ultra-low-power figure makes the device well-suited for portable and battery-powered designs such as handheld ultrasound and portable oscilloscopes where thermal budget is constrained. Source: MaxLinear CDK1308B product page.
What is the SNR performance of the CDK1308BILP40?
According to the MaxLinear CDK1308B product page, the CDK1308B achieves 61.6 dB SNR at an analog input frequency of 8 MHz. This signal-to-noise ratio is sufficient for IF sampling in communications receivers and for general-purpose data acquisition in industrial and test equipment applications.
Does the CDK1308BILP40 require an external voltage reference?
No. The CDK1308BILP40 integrates an internal reference circuit, eliminating the need for an external reference IC and associated bypass capacitors. This reduces BOM cost and board area, which is valuable in multi-channel designs where each ADC channel would otherwise require a dedicated reference.
What supply voltages does the CDK1308BILP40 require?
The CDK1308BILP40 operates from a 1.8 V analog core supply (AVDD) and a separate 1.7 V to 3.6 V digital I/O supply (DVDD). The split supply rails allow the digital output levels to be matched directly to the host FPGA, ASIC, or MCU without level shifters, simplifying board-level integration.
Is the CDK1308BILP40 pin-compatible with the CDK1307?
Yes. The CDK1308B family (10-bit) is pin-compatible with the CDK1307 family (12-bit). Designers can drop either ADC into the same 40-pin QFN footprint, enabling scalable platforms that trade resolution for power or cost across product tiers without PCB rework.
What output interface does the CDK1308BILP40 use?
The CDK1308BILP40 uses a parallel CMOS output interface. This allows direct connection to standard FPGA or MCU parallel data buses without an external serializer, simplifying layout and reducing latency in real-time signal processing applications.
Where can I buy the CDK1308BILP40 and what is the price?
As of 2026-10-13, the CDK1308BILP40 is available from authorized distributors including Mouser, with Octopart listing two active distributors and additional stock at independent distributors such as Micro-Semiconductor and Nantian Electronics. Unit pricing for 1-piece quantities is approximately USD 5.92, with quantity breaks at 10/100/500/1000 yielding USD 5.28/4.62/4.10/3.58 respectively. Source: Mouser, Octopart, Micro-Semiconductor.
What is the lead time for the CDK1308BILP40?
As of 2026-10-13, the CDK1308BILP40 shows active stock at Mouser and Octopart-listed distributors; independent distributors such as Micro-Semiconductor list 5,970 pieces in stock. Lead time through authorized channels is typically 6-10 weeks for factory orders, while independent distributors can ship immediately subject to quotation. Source: Micro-Semiconductor inventory page.
CDK1308BILP40 vs CDK1308CILP40 - which should I choose?
The CDK1308BILP40 is the 40 MSPS speed grade of the CDK1308B family, while the CDK1308CILP40 is the 65 MSPS speed grade of the CDK1308C family. Both share the same 10-bit resolution, 40-pin QFN package, and pin-compatible CDK1307 family footprint. Choose CDK1308BILP40 for portable, low-power designs below 40 MSPS; choose CDK1308CILP40 when you need the wider 65 MSPS bandwidth at higher power. Source: MaxLinear CDK1308 family page.
What is the best drop-in replacement for the CDK1308BILP40?
The best drop-in replacements for the CDK1308BILP40 are the other speed grades within the same CDK1308B/C family (CDK1308AILP20 at 20 MSPS, CDK1308CILP65 at 65 MSPS, CDK1308CILP80 at 80 MSPS), all sharing the 40-pin QFN footprint. The 12-bit CDK1307CILP40 is also pin-compatible if your design can benefit from higher resolution. Source: MaxLinear CDK1308B product page.
Where do I download the CDK1308BILP40 datasheet PDF?
The CDK1308BILP40 datasheet can be downloaded from the MaxLinear product archive at https://www.maxlinear.com/product/archive/sensing-andamp;-signal-conditioning/data-converters/analog-to-digital-converters/cdk1308b. Cross-reference copies are also available at alldatasheet.com (Exar Corporation datasheet PDF 868974/868976) and Octopart's datasheet portal.
Where can I find the CDK1308BILP40 pinout?
The CDK1308BILP40 uses a 40-pin QFN package (LP40). The pinout is published in the MaxLinear CDK1308B datasheet; the XAIPART product page also renders a pinout diagram (package_svg_key: qfn-40) with all 40 pins labeled by signal name. Source: MaxLinear CDK1308B datasheet; XAIPART product page.
What are the key specifications of CDK1308BILP40 that engineers should know?
The CDK1308BILP40 is a 10-bit, 40 MSPS ADC with 25 mW typical power dissipation, 61.6 dB SNR at 8 MHz input, 1.8 V analog supply, 1.7-3.6 V digital I/O supply, internal reference, parallel CMOS outputs, and a 40-pin QFN package. It is pin-compatible with the 12-bit CDK1307 family, enabling drop-in resolution upgrade. Source: MaxLinear CDK1308B product page.

Données de référence d'ingénierie pour CDK1308BILP40 — comparaison, recommandations de conception et informations de conformité.

Guide de sélection

Choose the CDK1308BILP40 when you need a 10-bit, 40 MSPS ADC with 25 mW typical dissipation for portable or battery-powered designs. The internal reference and 40-pin QFN footprint minimize BOM and board area, making it ideal for handheld oscilloscopes, portable medical imaging, IF sampling SDR, and low-cost industrial inspection cameras. Choose the pin-compatible CDK1307CILP40 if your system can benefit from 12-bit resolution at the same 40 MSPS rate. Choose CDK1308AILP20 for ultra-low-power applications below 20 MSPS. Choose CDK1308CILP65 or CDK1308CILP80 when higher Nyquist bandwidth is required. Avoid the CDK1308BILP40 if you need a true 12-bit or 14-bit ADC - in that case consider the ADS901E (10-bit, different package) or ADS6425IRGCR (12-bit, multi-channel) families.

Comparaison avec les alternatives

Paramètre Ce produit CDK1307CILP40 CDK1308AILP20 CDK1308CILP65 CDK1308CILP80 ADS901E/1KG4
Package 40-pin QFN (LP40) 40-pin QFN (LP40) - same 40-pin QFN (LP40) - same 40-pin QFN (LP40) - same 40-pin QFN (LP40) - same 28-pin SSOP (different package)
Brand MaxLinear (Exar) MaxLinear (Exar) MaxLinear (Exar) MaxLinear (Exar) MaxLinear (Exar) Texas Instruments
Resolution 10 bits 12 bits 10 bits 10 bits 10 bits 10 bits
Max Sample Rate 40 MSPS 40 MSPS 20 MSPS 65 MSPS 80 MSPS 20 MSPS
Pin-Compatible Family Upgrade Path CDK1307 (12-bit) / CDK1308C (65-80 MSPS) 12-bit upgrade Lower-power 20 MSPS drop 65 MSPS upgrade 80 MSPS upgrade Different package, not pin-compatible

Principaux différenciateurs

  • Ultra-low 25 mW dissipation at 40 MSPS for battery-powered designs (vs ADS901E/1KG4)
  • Pin-compatible resolution and speed upgrade path within same QFN footprint (vs ADS901E/1KG4)
  • Internal reference eliminates external reference BOM (vs ADS901E/1KG4)

Notes de conception

Estimated: at 1.8 V AVDD and 25 mW typical dissipation, the supply current is approximately 13.9 mA from AVDD plus the additional current drawn from DVDD at the chosen I/O voltage. Decouple AVDD and DVDD separately with a 1 µF ceramic bulk plus a 100 nF high-frequency bypass placed within 5 mm of each supply pin to suppress switching noise coupling into the analog front-end. Power-down (PD) pin reduces dissipation to microampere range when held low - use this aggressively in battery-powered designs between acquisitions.

The analog input is a switched-capacitor structure; drive it through a wideband op-amp or RF transformer with source impedance below 50 ohm at the highest input frequency of interest. Mismatched impedance at the analog input will degrade SNR at high Fin. Route the differential clock (CLKP/CLKN) as a matched-length pair and keep it physically separated from the analog input and parallel CMOS data outputs to avoid clock-feed-through coupling into the analog path.

The 40-pin QFN (LP40) exposed pad must be soldered to a continuous ground plane for thermal dissipation and electrical reference. Provide at least four thermal vias in the EP land pattern (0.3 mm drill, 1 mm pitch) to drop junction-to-ambient thermal resistance. Keep all analog traces on the top layer with a continuous ground plane beneath, and route parallel CMOS data outputs as a matched-length bus (within 2 mm of each other) to minimize skew into the receiving FPGA or MCU.

Do not exceed 1.8 V on AVDD - the part is not tolerant of higher analog supply voltages. DVDD range is 1.7-3.6 V but must be sequenced after AVDD to avoid latch-up. The internal reference is bypassed at the REF pin - do not load this pin with external circuitry. When upgrading to the pin-compatible CDK1307 (12-bit) family, re-evaluate SNR and linearity budgets because the 12-bit version has different analog input common-mode and gain characteristics.

Informations de conformité

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Sans plomb
Yes
Sans halogène
Unknown
Minerais de conflit
Compliant

RoHS and REACH compliance per MaxLinear (formerly Exar Corporation) product page. Not AEC-Q100 qualified - this part is targeted at industrial, medical, and consumer equipment, not automotive. Halogen-free status not stated in the verified web data - flagged as unknown.

Données vérifiées le : 2026-10-13 — données vérifiées et sélectionnées par l'équipe d'ingénierie composants de XAIPART

Recherches associées

CDK1308BILP40 CDK1308BILP40 datasheet MaxLinear CDK1308 ADC 10-bit 40 MSPS ADC QFN-40 ultra low power ADC 25 mW CDK1308 portable oscilloscope ADC CDK1308BILP40 vs CDK1307CILP40 CDK1308BILP40 drop-in replacement CDK1308BILP40 buy price what is the SNR of CDK1308B CDK1308BILP40 pinout QFN-40 low power ADC for medical imaging

Composants & termes associés

MaxLinear Exar Corporation CDK1308BILP40 CDK1308 CDK1307CILP40 CDK1308 family analog-to-digital converter ADC mixed-signal IC 10-bit resolution 40 MSPS ultra-low power ADC internal voltage reference parallel CMOS output QFN-40 package LP40 suffix medical imaging portable test equipment IF communications digital oscilloscope 61.6 dB SNR 1.8 V analog supply RoHS compliant Exar / MaxLinear merger
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