DSPIC33FJ128MC710A-E/PF - 16-bit DSC, 40 MIPS, 128KB Flash | Microchip
Référence : DSPIC33FJ128MC710A-E/PF ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $16.32 | $16,32 |
| 10 | $14.69 | $146,90 |
| 100 | $13.05 | $1 305,00 |
| 500 | $11.74 | $5 870,00 |
| 1 000 | $10.43 | $10 430,00 |
DSPIC33FJ128MC710A-E/PF Présentation
What is a Digital Signal Controller (DSC)? A DSC is a hybrid microcontroller that combines an MCU's deterministic interrupt-driven control peripherals with a DSP's single-cycle MAC instruction set and dedicated compute engine. In the broader taxonomy, a DSC sits above a microcontroller (MCU) but below a standalone DSP, occupying the real-time control niche where MCU alone lacks MAC throughput and DSP alone lacks deterministic I/O. The dsPIC33F family targets applications requiring both closed-loop control and on-the-fly signal processing, putting it in the same role as Infineon Aurix TC2 or TI C2000 families.
The device integrates up to 85 general-purpose I/O, two CAN modules, two UART/SPI/I2C modules each, a 12-bit 1.1 Msps ADC with up to 24 channels, six PWM outputs with flexible fault input, and a 16-bit timer/capture block. The DSP engine adds fractional and integer MAC, barrel shifter, and saturating arithmetic for tight inner-loop execution. 3.0 V to 3.6 V single-supply operation and an extended -40 C to +125 C junction range suit industrial motor drives.
Architecturally, the dsPIC33FJ128MC710A pairs a Harvard bus with a 40 MHz oscillator and PLL providing up to 80 MHz internal FCY (40 MIPS). This is more than double typical 16-bit MCU throughput and enables sensorless motor control loops to execute within 10 us. The integration of CAN and dedicated motor-control PWM with 14.5 ns resolution eliminates companion logic, reducing BOM and PCB area for inverter designs.
Typical applications include industrial BLDC/PMSM servo drives, robotic actuators, HVAC compressor controllers, e-bike controllers, and appliance motor inverters. Designers also deploy it in digital power conversion such as solar micro-inverters and telecom rectifiers where the DSP MAC accelerates control-loop math.
Key design consideration: place the device's analog and digital ground returns as separate nets joining only at a single point near the AGND pin, since the on-chip ADC's 1.1 Msps performance is sensitive to digital switching noise injected through shared ground.
This page consolidates manufacturer datasheet parameters, distributor stock, drop-in same-package alternatives from the same dsPIC33F family, and practical design notes not found in the bare datasheet PDF.
Alternatives de remplacement direct pour DSPIC33FJ128MC710A-E/PF — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec DSPIC33FJ128MC710A-E/PF (même facteur de forme et même empreinte) — différant par ADC, Package, Core Architecture, Maximum CPU Speed, Operating Temperature.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
DSPIC33FJ128MC710A-I/PF
✅ Remplacement direct✓ En stock
$6.45 / unité
Voir la fiche technique →DSPIC33FJ256MC710A-E/PF
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$8.65 / unité
Voir la fiche technique →DSPIC33FJ128MC510A-E/PF
✅ Remplacement direct✓ En stock
$7.65 / unité
Voir la fiche technique →DSPIC33FJ64MC710A-E/PF
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
DSPIC33FJ128GP710A-E/PF
✅ Remplacement direct✓ En stock
$6.25 / unité
Voir la fiche technique →DSPIC33FJ128MC710A-E/PF Valeurs maximales et caractéristiques électriques
| Core Architecture | dsPIC33F 16-bit DSC (Harvard bus + DSP engine) |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data RAM | 16 KB |
| Maximum CPU Speed | 40 MIPS (FCY = 80 MHz internal) |
| Operating Voltage (Vdd) | 3.0 V to 3.6 V |
| Température de fonctionnement | -40 C to +125 C (E suffix = industrial) |
| ADC | 12-bit, up to 1.1 Msps, up to 24 channels |
| PWM Channels | 6 channels with 14.5 ns resolution |
| General-Purpose I/O | 85 |
| CAN Modules | 2 |
| UART / SPI / I2C | 2 each |
| Timers (16-bit) | 5 (Type A/B/C mixed) |
| Boîtier | 100-TQFP (14x14 mm), PF suffix |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant (ROHS3 per ics-embedded listing) |
Configuration des broches de DSPIC33FJ128MC710A-E/PF
| Broche 1 | OSC1 — Crystal/oscillator input |
| Broche 2 | OSC2 — Crystal/oscillator output |
| Broche 3 | FLTA1 — PWM fault A input 1 |
| Broche 4 | FLTA2 — PWM fault A input 2 |
| Broche 5 | FLTA3 — PWM fault A input 3 |
| Broche 6 | FLTA4 — PWM fault A input 4 |
| Broche 7 | PWM1H — PWM1 high-side output |
| Broche 8 | PWM1L — PWM1 low-side output |
| Broche 9 | PWM2H — PWM2 high-side output |
| Broche 10 | PWM2L — PWM2 low-side output |
| Broche 11 | PWM3H — PWM3 high-side output |
| Broche 12 | PWM3L — PWM3 low-side output |
| Broche 13 | FLTB1 — PWM fault B input 1 |
| Broche 14 | FLTB2 — PWM fault B input 2 |
| Broche 15 | FLTB3 — PWM fault B input 3 |
| Broche 16 | FLTB4 — PWM fault B input 4 |
| Broche 17 | RE0 — GPIO / AN20 |
| Broche 18 | RE1 — GPIO / AN21 |
| Broche 19 | RE2 — GPIO / AN22 |
| Broche 20 | RE3 — GPIO / AN23 |
| Broche 21 | RE4 — GPIO / AN24 |
| Broche 22 | RE5 — GPIO / AN25 |
| Broche 23 | RE6 — GPIO / AN26 |
| Broche 24 | RE7 — GPIO / AN27 |
| Broche 25 | AVDD — Analog supply (3.3 V) |
| Broche 26 | AVSS — Analog ground |
| Broche 27 | AN0 — Analog input 0 |
| Broche 28 | AN1 — Analog input 1 |
| Broche 29 | AN2 — Analog input 2 |
| Broche 30 | AN3 — Analog input 3 |
| Broche 31 | AN4 — Analog input 4 |
| Broche 32 | AN5 — Analog input 5 |
| Broche 33 | AN6 — Analog input 6 |
| Broche 34 | AN7 — Analog input 7 |
| Broche 35 | AN8 — Analog input 8 |
| Broche 36 | AN9 — Analog input 9 |
| Broche 37 | AN10 — Analog input 10 |
| Broche 38 | AN11 — Analog input 11 |
| Broche 39 | AN12 — Analog input 12 |
| Broche 40 | AN13 — Analog input 13 |
| Broche 41 | AN14 — Analog input 14 / VREF- reference |
| Broche 42 | AN15 — Analog input 15 / VREF+ reference |
| Broche 43 | VDD — Digital supply (3.3 V) |
| Broche 44 | VSS — Digital ground |
| Broche 45 | RF0 — GPIO |
| Broche 46 | RF1 — GPIO |
| Broche 47 | RF2 — GPIO |
| Broche 48 | RF3 — GPIO |
| Broche 49 | RF4 — GPIO |
| Broche 50 | RF5 — GPIO |
| Broche 51 | RF6 — GPIO |
| Broche 52 | RF7 — GPIO / CANTX2 secondary |
| Broche 53 | RG0 — GPIO |
| Broche 54 | RG1 — GPIO |
| Broche 55 | RG2 — GPIO |
| Broche 56 | RG3 — GPIO |
| Broche 57 | RG6 — GPIO / COSC1 |
| Broche 58 | RG7 — GPIO / COSC2 |
| Broche 59 | RH0 — GPIO |
| Broche 60 | RH1 — GPIO |
| Broche 61 | RH2 — GPIO |
| Broche 62 | RH3 — GPIO |
| Broche 63 | RH4 — GPIO |
| Broche 64 | RH5 — GPIO |
| Broche 65 | RH6 — GPIO |
| Broche 66 | RH7 — GPIO |
| Broche 67 | RJ0 — GPIO |
| Broche 68 | RJ1 — GPIO |
| Broche 69 | RJ2 — GPIO |
| Broche 70 | RJ3 — GPIO |
| Broche 71 | RJ4 — GPIO |
| Broche 72 | RJ5 — GPIO |
| Broche 73 | RJ6 — GPIO |
| Broche 74 | RJ7 — GPIO |
| Broche 75 | RK0 — GPIO |
| Broche 76 | RK1 — GPIO |
| Broche 77 | RK2 — GPIO |
| Broche 78 | RK3 — GPIO |
| Broche 79 | RK4 — GPIO |
| Broche 80 | RK5 — GPIO |
| Broche 81 | RK6 — GPIO |
| Broche 82 | RK7 — GPIO |
| Broche 83 | RL0 — GPIO |
| Broche 84 | RL1 — GPIO |
| Broche 85 | RL2 — GPIO |
| Broche 86 | RL3 — GPIO |
| Broche 87 | RL4 — GPIO |
| Broche 88 | RL5 — GPIO |
| Broche 89 | RL6 — GPIO |
| Broche 90 | RL7 — GPIO |
| Broche 91 | MCLR — Master clear reset (active-low) |
| Broche 92 | RA0 — GPIO / AN16 |
| Broche 93 | RA1 — GPIO / AN17 |
| Broche 94 | RA2 — GPIO / AN18 |
| Broche 95 | RA3 — GPIO / AN19 |
| Broche 96 | RA4 — GPIO |
| Broche 97 | RA5 — GPIO |
| Broche 98 | RA6 — GPIO / OSC1 alt |
| Broche 99 | RA7 — GPIO / OSC2 alt |
| Broche 100 | VSS — Digital ground |
Applications typiques
DSPIC33FJ128MC710A-E/PF convient pour 6 applications: Brushless DC (BLDC) Motor Drive, Three-Phase Induction Motor Inverter, PMSM Servo Drive (Field-Oriented Control), Digital Switching Power Supply, Industrial Robot Arm Controller, Solar Micro-Inverter / Residential Energy Storage.
Brushless DC (BLDC) Motor Drive
The DSPIC33FJ128MC710A-E/PF fits BLDC motor drives because its six 14.5 ns-resolution PWM channels drive three-phase inverter legs with center-aligned switching up to ~50 kHz, while the DSP engine executes sensorless back-EMF or FOC commutation within a 25 us loop period. The 12-bit dual-sample-and-hold ADC samples two shunt currents simultaneously, eliminating phase-delay distortion. The 128 KB Flash holds state-machine tables, sinusoidal commutation LUTs, and a CANopen stack without external memory, and the two CAN modules enable multi-axis networked drives. Compared with a discrete MCU+FPGA solution, the integration reduces BOM by ~5 components and shrinks PCB to ~25 cm sq.
Recommandé
Three-Phase Induction Motor Inverter
For industrial three-phase induction motor control, the DSPIC33FJ128MC710A-E/PF runs V/F, open-loop scalar, or indirect FOC algorithms at the full 40 MIPS. The 16 KB SRAM accommodates Clarke-Park transforms, PI controller states, and sinusoidal encoder feedback buffers without forced off-chip memory access, eliminating cycle-stealing wait states. The 85 GPIOs drive gate-driver bootstrap control signals, brake-FET control, and isolated I/O for end-of-line and emergency stop circuits, leaving dual CAN available for industrial-bus communications. Thermal performance at +125 C junction extends to outdoor drive cabinets and aerospace actuator housings.
Recommandé
PMSM Servo Drive (Field-Oriented Control)
In PMSM servo drives the DSPIC33FJ128MC710A-E/PF executes full vector (FOC) current control plus position-velocity loop in software, with the DSP's single-cycle MAC running the inverse Park transform and SVPWM modulator in <5 us. The 1.1 Msps 12-bit ADC with dual-sample-and-hold captures Ia and Ib currents synchronized to the PWM reload, removing the settling-time error that plagues single-channel sampling. 16 KB SRAM holds the full observer state space (Back-EMF estimator or sliding-mode observer), allowing shaft-sensorless operation at zero speed. The two CAN modules support CANopen DS402 and EtherCAT-to-CAN bridge protocols in the same chip.
Recommandé
Digital Switching Power Supply
For digitally controlled SMPS the DSPIC33FJ128MC710A-E/PF's 40 MIPS enables sub-microsecond voltage-mode or current-mode control loops at switching frequencies up to 1 MHz. The 12-bit ADC with 1.1 Msps sampling and sub-100 ns trigger-to-conversion latency supports output-voltage sense plus primary-current sense in single-cycle sampling. Three of the six PWM channels deliver complementary gate-drive signals with programmable dead-time, eliminating the external gate-driver timing chip. The 128 KB Flash absorbs digital-compensation look-up tables, soft-start ramps, and PMBus firmware in a single chip, reducing BOM and improving reliability versus analog controller implementations.
Recommandé
Industrial Robot Arm Controller
In multi-axis robot-arm controllers the DSPIC33FJ128MC710A-E/PF drives one or two servo axes per chip with full FOC, leaving two on-chip CAN nodes to daisy-chain axes and an external EtherCAT/EtherNet/IP master. The 85 GPIOs handle encoder-A/B/Z inputs, end-stop sensors, and servo-driver enable signals without external glue logic. 40 MIPS throughput per axis sustains 8 kHz torque loop with quadratic observers fitting entirely in 16 KB SRAM. The -40 to +125 C operating range handles ambient temperatures inside sealed robot-arm enclosures where continuous current draw pushes components to thermal edges.
Recommandé
Solar Micro-Inverter / Residential Energy Storage
The DSPIC33FJ128MC710A-E/PF handles single-panel MPPT + DC-AC inversion in micro-inverter designs. Its DSP engine runs perturb-and-observe or incremental-conductance MPPT at <1 ms update with current-loop tracking inline, while the 12-bit ADC samples PV voltage and current plus output AC-current in single-cycle sampling. The 6 PWM channels drive interleaved boost MPPT plus full-bridge 60 Hz inverter; the second CAN enables parallel-string communications. The 128 KB Flash hosts grid-safety (anti-islanding), reactive-power control, and Modbus over RS-485 firmware stacks with margin.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour DSPIC33FJ128MC710A-E/PF — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | DSPIC33FJ128MC710A-I/PF | DSPIC33FJ256MC710A-E/PF | DSPIC33FJ128MC510A-E/PF | DSPIC33FJ64MC710A-E/PF | DSPIC33FJ128GP710A-E/PF |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | TQFP-100 (14x14) - PF | TQFP-100 (14x14) - PF (same) | TQFP-100 (14x14) - PF (same) | TQFP-100 (14x14) - PF (same) | TQFP-100 (14x14) - PF (same) | TQFP-100 (14x14) - PF (same) |
| Flash Memory | 128 KB | 128 KB | 256 KB | 64 KB | 64 KB | 128 KB |
| RAM | 16 KB | 16 KB | 16 KB | 8 KB | 8 KB | 16 KB |
| CPU Speed | 40 MIPS (80 MHz FCY) | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Operating Temperature | -40C to +125C | -40C to +85C | -40C to +125C | -40C to +125C | -40C to +125C | -40C to +125C |
| GPIO Count | 85 | 85 | 85 | 35 | 85 | 85 |
| CAN Modules | 2 | 2 | 2 | 1 | 2 | 2 |
| PWM Channels | 6 (motor-control PWM) | 6 | 6 | 6 | 6 | General-purpose PWM only (no dedicated MC PWM) |
Principaux différenciateurs
- Industry-standard motor-control peripherals integrated with dual CAN (vs DSPIC33FJ128GP710A-E/PF (general-purpose variant))
- Higher Flash/RAM than the lower-end MC510A family member (vs DSPIC33FJ128MC510A-E/PF)
- Industrial temperature grade (-40 to +125C) matched in same package (vs DSPIC33FJ128MC710A-I/PF (industrial +85C variant))
- Single-chip dual CAN bridge for industrial networking (vs External CAN MCP2515 + host MCU approach)
Notes de conception
Use a star-ground topology where the DSPIC33FJ128MC710A-E/PF's AVSS and VSS pins connect independently to a single-point ground near the voltage regulator return. Route analog signals away from PWM switching traces; place a 0.1 uF + 10 uF capacitor pair on AVDD within 5 mm of the package to suppress ADC sampling transients. Add a ferrite bead between VDD and AVDD if high-current digital outputs share AVDD rail current.
Do not exceed AVDD or VDD above 3.6 V or below 3.0 V; the dsPIC33F core is not 5 V tolerant. The MCLR pin must have a 10 kohm pull-up to VDD - leaving it floating produces erratic resets on EMC events. When running the PLL at 8x multiplier, ensure the input crystal or clock source has <50 ps RMS jitter, otherwise the DSP MAC timing becomes marginal above 35 MIPS sustained throughput.
For ADC sampling at >500 ksps, use the on-chip simultaneous dual-sample-and-hold mode (S/H triggered from PWM), not sequential scanning, which introduces phase delay between Ia and Ib reading that corrupts FOC current loops at >5 kHz rotation. Tie unused ADC inputs to AVDD or AVSS through 100 kohm resistors - floating inputs cause ADC offset drift and increased noise.
At 80 MHz FCY the DSPIC33FJ128MC710A-E/PF draws ~120 mA from 3.3 V = ~400 mW typical dissipation. The 100-TQFP package has junction-to-ambient theta_JA around 50 C/W (4-layer PCB); with +85 C ambient a 4 W internal budget gives only 15 C headroom. Provide 4-layer PCB with full copper pour under the exposed pad thermal tie, or use external airflow at >1 m/s for enclosed motor-inverter housings.
Informations de conformité
ROHS3 compliant per ics-embedded listing. No AEC-Q100 qualification - choose dsPIC33 family members with explicit automotive-grade designation for AEC-Q100 applications. Lead-free per Microchip's RoHS3 product change notice. Halogen-free status not declared in retrieved data.
