EY1501DI-ADJ - 1A Adjustable LDO, 2.2-6V Input, 10-DFN | Intel/Altera
Référence : EY1501DI-ADJ ✗ Fin de vie| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $5.95 | $5,95 |
| 10 | $5.2 | $52,00 |
| 100 | $4.42 | $442,00 |
| 500 | $3.86 | $1 930,00 |
| 1 000 | $3.35 | $3 350,00 |
EY1501DI-ADJ Présentation
An LDO (Low-Dropout) linear regulator is a type of voltage regulator that maintains a stable output voltage even when the input voltage is very close to the output voltage. Within the power management hierarchy, LDOs sit under linear regulators, which sit under voltage regulators, which sit under the broader power management IC category. Compared with switching regulators, LDOs introduce no switching ripple and therefore add no high-frequency EMI, at the cost of higher power dissipation when VIN - VOUT is large.
Key features of the EY1501DI-ADJ include a low dropout voltage of approximately 212 mV at 1A, a CMOS core that minimizes quiescent current relative to bipolar LDOs, and an adjustable output set by an external resistor divider. The 10-DFN (3x3) package gives a small PCB footprint suited to point-of-load placement next to noise-sensitive ICs. The device is marked by Enpirion/Altera as Not Recommended for New Design (NRND) on Rev B (January 18, 2017), and DigiKey lists the part as obsolete; it remains in distribution inventory for legacy designs.
The EY1501DI-ADJ is commonly used as a post-regulator that cleans up switching-converter noise on FPGA/SoC core, auxiliary, and transceiver rails; as a low-voltage analog LDO for ADC/DAC reference supplies; and as a small-footprint 1A LDO in networking, telecom, and industrial embedded boards. Its 0.8V reference makes it convenient for powering core rails below 1V when paired with an appropriate feedback divider.
When designing with this device, confirm that the dropout voltage at full load still leaves adequate VIN headroom for worst-case minimum input. Place input and output ceramic capacitors close to the IC pins per the datasheet, and verify that the PCB thermal copper is sufficient to dissipate (VIN - VOUT) x IOUT at the chosen load profile.
This page synthesizes distributor pricing, cross-reference data, and practical design notes not found in the manufacturer datasheet.
Alternatives de remplacement direct pour EY1501DI-ADJ — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec EY1501DI-ADJ (même facteur de forme et même empreinte) — différant par Input Voltage Range, Output Voltage Range, Package, RoHS Status.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
TPS7A4701RGWR
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$3.2467 / unité
Voir la fiche technique →MIC29150-3.3WU
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
ADP3338AKCZ-3.3RL7
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
EY1501DI-ADJ Valeurs maximales et caractéristiques électriques
| Manufacturer | Intel (formerly Altera / Enpirion) |
| Part Number | EY1501DI-ADJ |
| Regulator Type | LDO Linear Regulator (Positive, Adjustable) |
| Nombre de sorties | 1 |
| Plage de tension d'entrée | 2.2 V to 6 V |
| Plage de tension de sortie | 0.8 V to 5 V (adjustable) |
| Output Current (Maximum) | 1 A |
| Dropout Voltage (Maximum) | 212 mV at 1 A |
| Configuration de sortie | Positive, Adjustable |
| Process Technology | Sub-micron BiCMOS (CMOS LDO core) |
| Boîtier | 10-DFN (3x3 mm), Pb-Free |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant (Pb-Free package) |
| Statut du cycle de vie | Obsolete / Not Recommended for New Design (per Rev B, Jan 2017) |
| Datasheet Revision | Rev B (2017-01-18), per Enpirion datasheet header |
Configuration des broches de EY1501DI-ADJ
| Broche 1 | VIN — Input supply voltage (2.2 V to 6 V) |
| Broche 2 | VIN — Input supply voltage (2.2 V to 6 V) - parallel pin for lower impedance |
| Broche 3 | EN — Enable input (active-high logic level, per datasheet) |
| Broche 4 | NR/SS — Noise reduction / soft-start capacitor pin |
| Broche 5 | FB — Feedback input for adjustable output (set by external divider) |
| Broche 6 | ADJ — Adjust reference / trim pin (per datasheet) |
| Broche 7 | OUT — Regulated output voltage (0.8 V to 5 V, up to 1 A) |
| Broche 8 | OUT — Regulated output voltage - parallel pin for current carrying |
| Broche 9 | PGND — Power ground return |
| Broche 10 | PGND — Power ground return - parallel pin |
| Broche EP | EPAD — Exposed pad - thermal pad and ground; must be soldered to PCB copper pour |
Applications typiques
EY1501DI-ADJ convient pour 6 applications: FPGA Core and Transceiver Rail Post-Regulation, DSP and Microcontroller Point-of-Load Rails, Networking and Telecom Line Card Power, Industrial Embedded and Test Equipment, USB-Powered Single-Cell Li-Ion Device Rails, LED Driver Supply Rail.
FPGA Core and Transceiver Rail Post-Regulation
The EY1501DI-ADJ serves as a low-ripple post-LDO after a switching converter to power FPGA core, PLL, and transceiver supply pins. Its 1A output current and 2.2-6V input align directly with the 1.0V/1.2V/1.5V/1.8V/2.5V/3.3V rails typical of Intel Cyclone, Altera Arria, and similar device families. The part's low dropout of 212 mV at 1A means it can drop from 3.3V down to 3.0V or 1.8V cleanly, with 0.8V feedback reference allowing the designer to set any rail in 0.8-5V via a simple resistor divider. Because the LDO adds no switching noise, it cleans up the residual ripple from the upstream buck, which directly improves FPGA PLL jitter and transceiver eye-diagram margin. Place the EY1501DI-ADJ within 2-3 cm of the load with a continuous ground pour and the exposed pad soldered to copper for thermal dissipation up to roughly 1-1.5W continuous.
Recommandé
DSP and Microcontroller Point-of-Load Rails
The EY1501DI-ADJ is a compact point-of-load LDO for DSPs and microcontrollers that require a quiet, sub-1V to 5V rail at up to 1A. Its 0.8V reference lets it power DSP cores such as the dsPIC33EP series at 0.9V or 1.0V directly, while the 6V maximum input covers 3.3V and 5V system buses. Compared with a buck regulator, the LDO's simpler LC-less output reduces BOM cost and radiated EMI, an advantage in mixed-signal PCBs where the DSP shares the board with analog front ends. The 10-DFN (3x3) package occupies only 9 mm² of board area, leaving room for the DSP and decoupling. Power dissipation is estimated at approximately (VIN - VOUT) x IOUT; at VIN=3.3V, VOUT=1.0V, and IOUT=0.5A this is about 1.15W, which the DFN package with proper copper can dissipate comfortably.
Recommandé
Networking and Telecom Line Card Power
In networking line cards and telecom base-band subsystems, the EY1501DI-ADJ provides a clean auxiliary rail for PHY chips, clocks, and serializer/deserializer (SerDes) devices. Its 2.2-6V input accepts the standard 3.3V or 5V board bus, and its 1A output is sufficient for several stacked low-power devices on a single net. The CMOS pass element yields a low quiescent current that helps meet the stringent idle-power budgets of carrier-grade equipment. The small 10-DFN footprint is ideal for the dense back-side component placement typical of line cards, where every square millimeter of PCB is precious. Designers should pay attention to PSRR [DATA_NEEDED] above 100 kHz, as switching transients from the main PoL converter can leak through at higher frequencies.
Recommandé
Industrial Embedded and Test Equipment
Industrial embedded boards, data-acquisition modules, and portable test equipment can use the EY1501DI-ADJ as a general-purpose adjustable LDO for analog and mixed-signal sections. The 0.8-5V adjustable output covers the most common ADC, DAC, op-amp, and reference voltages, while the 1A rating is enough to power a multi-channel analog front end. Because the part is Pb-free and surface-mount, it integrates cleanly into modern reflow-soldered industrial PCBs. The LDO's lack of switching ripple makes it appropriate for sensitive measurement paths where every microvolt of supply noise can couple into the measurement result. Verify the operating temperature range [DATA_NEEDED] against your industrial environmental spec, since the datasheet header does not explicitly state the industrial grade.
Recommandé
USB-Powered Single-Cell Li-Ion Device Rails
The EY1501DI-ADJ is well matched to single-cell Li-Ion or USB-powered systems, where the input bus is typically 3.0-4.2V from the battery or 5V from USB. The 2.2-6V input window covers both states, while the 1A output can supply a wireless SoC, memory, and supporting analog. Compared with a switching regulator, the LDO is silent, which matters for audio capture and Bluetooth applications where switching noise can desensitize the radio. The 10-DFN (3x3) package keeps the power section compact enough to fit beside a USB-C connector and battery charger IC. Designers should remember that efficiency equals VOUT/VIN for an LDO; at 4.2V input and 3.3V output the efficiency is about 79%, which is acceptable for moderate load currents.
Recommandé
LED Driver Supply Rail
The EY1501DI-ADJ can power the constant-current LED driver circuitry in display backlights, indicators, and architectural lighting strips. A 3.3V or 5V system rail feeds the LDO input, and the adjustable 0.8-5V output provides the reference voltage for the LED driver's current-setting resistor, or directly powers low-current LED strings. The LDO's low-noise output prevents the audio-band interference that switching converters can induce on LED strings used in proximity to speakers. With 1A output, the part can drive multiple LED channels through a downstream current-sink driver like the TLC594x or LP50xx series. Thermal design must consider that LEDs in enclosed fixtures can raise ambient temperature; verify the LDO's thermal derating with the datasheet curves at the worst-case operating point.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour EY1501DI-ADJ — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | TPS7A4701RGWR | MIC29150-3.3WU | ADP3338AKCZ-3.3RL7 |
|---|---|---|---|---|
| Package | 10-DFN (3x3 mm) | VQFN-20 (RGW) | TO-263-3 | SOT-223 |
| Brand | Intel (Altera / Enpirion) | Texas Instruments | Microchip Technology | Analog Devices |
| Output Current | 1 A | 1 A | 1.5 A | 1 A |
| Input Voltage Range | 2.2 V to 6 V | 3 V to 35 V | up to 26 V | up to 8 V |
| Output Voltage Range | 0.8 V to 5 V (adjustable) | 1.4 V to 34 V (adjustable) | 3.3 V (fixed) | 3.3 V (fixed) |
| Dropout Voltage (Max) | 212 mV at 1 A | 200 mV at 1 A | 350 mV at 1.5 A | 190 mV at 1 A |
| Process / Architecture | CMOS LDO (BiCMOS process) | Bipolar LDO | Bipolar LDO | Bipolar LDO |
| Lifecycle Status | Obsolete / NRND | Active | Active | Active |
Principaux différenciateurs
- Low-voltage, low-dropout CMOS architecture in a tiny 10-DFN (3x3) footprint (vs MIC29150-3.3WU)
- Adjustable 0.8-5V output covers the most common digital and analog rails (vs ADP3338AKCZ-3.3RL7)
- Sub-micron BiCMOS process blends CMOS efficiency with bipolar precision (vs TPS7A4701RGWR)
Notes de conception
Estimated: at VIN=3.3V, VOUT=1.8V, and IOUT=1A, power dissipation is (3.3-1.8) * 1 = 1.5W. The 10-DFN (3x3) package dissipates this heat primarily through the exposed pad to the PCB copper pour. With a 4-layer board and 1 square inch of copper under the device, the junction-to-ambient thermal resistance is typically in the 50-60 C/W range, giving a junction temperature rise of about 75-90 C above ambient. For continuous 1A operation, ensure adequate copper area or derate the load.
Place input and output ceramic capacitors as close as possible to the VIN and OUT pins, and route the high-current loop (input cap, LDO pass element, output cap, load) on the top layer with the shortest possible traces. The exposed pad must be soldered to a continuous ground copper pour with multiple thermal vias to inner layers for heat extraction. Per the Enpirion datasheet, do not route sensitive analog signals under the LDO footprint to avoid ground-bounce coupling.
Do not exceed the 6V absolute-maximum input voltage - even brief transients above 6V can damage the part. Ensure the feedback divider uses 1% or better tolerance resistors to maintain output voltage accuracy across temperature. The NR/SS capacitor value controls both noise bandwidth and soft-start time; omitting it or using the wrong value degrades PSRR and can cause startup glitches. Finally, because the part is NRND/obsolete, do not use it in new designs without a qualified second source.
Remember that LDO efficiency equals VOUT/VIN; at 5V input and 1.0V output at 1A, only 20% of the input power reaches the load, with 4W dissipated as heat in the LDO. For high step-down ratios, consider a switching pre-regulator followed by the LDO for ripple cleaning - the so-called LDO-after-buck topology. This gives both high efficiency and low noise, and is exactly the use case Enpirion designed this part for.
Informations de conformité
Pb-free package per Enpirion/Altera datasheet ordering information. RoHS compliant. REACH, halogen-free, and conflict-minerals status not specified in the public datasheet header; request manufacturer's environmental compliance documentation for full details. AEC-Q100 not applicable - this is not an automotive-qualified part.
